Class-C power amplifier design for GSM application (original) (raw)
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Class-E Amplifier Design Improvements for GSM Frequencies
The Journal of Engineering Research [TJER], 2011
Efficient power amplifiers are essential in portable battery-operated systems such as mobile phones. Also, the power amplifier (PA) is the most power-consuming building block in the transmitter of a portable system. This paper investigates how the efficiency of the power amplifier (which is beneficial for multiple applications in communcation sector) can be improved by increasing the efficiency of switching mode class E power amplifiers for frequencies of 900 MHz and 1800 MHz. The paper tackles modeling, design improvements and verification through simulation for higher efficiencies. This is the continuation of previous work by the authors. These nonlinear power amplifiers can only amplify constant-envelope RF signals without introducing significant distortion. Mobile systems such as Advanced Mobile Phone System (AMPS) and Global System for Mobile communications (GSM) use modulation schemes which generate constant amplitude RF outputs in order to use efficient but nonlinear power a...
IJREAM PUBLISHING HOUSE, 2023
At present, saving energy is one of the important goals, keeping this in mind we present a new approach to design class c amplifier which works at very low power consumption in the range of micro watt and low noise in range nano watt and works in frequency range tera hertz 1.563THz to 6.930 THz with voltage gain 20dB. Present pair is combination of NMOS and PMOS in compound pair form and it is simulated on cadence virtuoso software at 180nm scale. It can be used in radio astronomy, satellite, communications.
Design of a Class F Power Amplifier with 60% Efficiency at 1800 MHz Frequency
Bulletin of Electrical Engineering and Informatics, 2015
Based on the portable systems application, it is necessary to design blocks with high efficiency to increase battery lifetime. Power amplifier is the highest power consumption block in transmitter. The proposed circuit was simulated using ADS Agilent based on 0.18 μm TSMC RF CMOS technology and supply voltage of 3.3V on transistor level. The proposed power amplifier was designed by Class F type at 1800 MHz with 60% efficiency and output powers of 30 dBm.
1 a Cmos Low Voltage Class-E Power Amplifier for Umts
2015
Abstract: In this paper we design a low-voltage class-E power amplifier (PA) in a standard CMOS 0.35µm integrated technology, to be used in a UMTS transceiver having the following specifications: f=1.95 GHz, VDC=1 V, Pout=0.5 W. The designed class-E network accommodates the simultaneous presence of a parasitic ground in-ductance and losses in the switch and shunt-capacitor. The transistor is dimensioned for an optimum PAE (power added efficiency). Finally, we simulate the power con-trol capabilities and highlight linearization methods.
A CMOS LOW VOLTAGE CLASS-E POWER AMPLIFIER FOR UMTS
In this paper we design a low-voltage class-E power amplifier (PA) in a standard CMOS 0.35µm integrated technology, to be used in a UMTS transceiver having the following specifications: f=1.95 GHz, V DC =1 V, P out =0.5 W. The designed class-E network accommodates the simultaneous presence of a parasitic ground inductance and losses in the switch and shunt-capacitor. The transistor is dimensioned for an optimum PAE (power added efficiency). Finally, we simulate the power control capabilities and highlight linearization methods.
Design of a C-Band CMOS class AB power amplifier for an ultra low supply voltage of 1.9 V
2007 SBMO/IEEE MTT-S International Microwave and Optoelectronics Conference, 2007
Present day power amplifier (PA) design struggles with the fact that applicable supply voltages are continuously shrinking for short channel MOS transistors, which makes reaching high output power values increasingly difficult. This work develops a Class AB PA with an optimized load impedance for maximum output power with the help of a systematic loadpull analysis. It will display necessary trade offs for optimum output power and small signal gain. The presented PA, realized in CMOS, shows a measured output power of 19.8 dBm at 5.8 GHz for a supply voltage of 1.9 V. The drain efficiency at the 1 dB compression point reaches 28.1 %, the highest report up to today for this output power level.
A Class-E GSM-Handset PA with Increased Efficiency
33rd European Microwave Conference, 2003, 2003
Today's GSM handset PA implementations give lots of room for efficiency improvement due to the fact that especially in the power-backoff region most of the consumed input power provided by the handset battery is dissipated as heat. This reduces the maximum talking time significantly and makes utilization of smaller batteries impossible. Switching amplifiers provide by default the highest possible efficiency while their drawbacks, such as narrow bandwidth and low linearity, do not apply to the GSM system due to the used modulation scheme, GMSK. In this paper, a demonstrator for GSM handsets is presented. Using Class-E amplification, it provides the necessary output power of 2 W at an efficiency far beyond present solutions while maintaining the GSM specifications. Furthermore, concepts for efficient power control of this amplifier are proposed.
Efficiency Analysis of Low Power Class-E Power Amplifier
Modern Applied Science, 2014
This paper presents an analysis of effect of inductor and switch losses on output power and efficiency of low power class-E power amplifier. This structure is suitable for integrated circuit implementation. Since on chip inductors have large losses than the other elements, the effect of their losses on efficiency has been investigated. Equations for the efficiency have been derived and plotted versus the value of inductors and switch losses. Derived equations are evaluated using MATLAB. Also, Cadence Spectre has been used for schematic simulation. Results show a fair matching between simulated power loss and efficiency and MATLAB evaluations. Considering the analysis, the proposed power amplifier shows about 13 % improvement in power effiency at 400 MHz and -2 dBm output power. It is simulated in 0.18 ?m CMOS technology.
Analysis and design of class-O RF power amplifiers for wireless communication systems
Analog Integrated Circuits and Signal Processing, 2016
In this paper, we present analysis, design and show experimental results of a new type of CMOS based power amplifier (PA) known as class-O Aref et al. (ISSCC Digest of Technical Papers, 2015). Modern CMOS based PAs design is constrained by three fundamental trade-offs, i.e. linearity, efficiency and reliability. More precisely, for a standalone PA, unless advanced and expensive solutions are employed, no such PA architecture exists which is able to meet aforementioned design trade-offs. Theoretical insight is needed to understand the origin of performance trade-offs and the possible solutions to counter them. Class-O is a novel out-of-the-box solution to meet these tough challenges. Our prototype amplifier is a highly linear low-band 706 MHz 4G long term evolution (LTE) compatible class-O RF power amplifier in 130 nm CMOS technology for handheld wireless applications. The class-O architecture uses two sub-amplifiers working together as one grand PA. These two sub-amplifiers are commonsource (CS) and common-drain (CD) amplifiers working in parallel feeding a common load with high linearity without the need for digital predistortion (DPD). The prototype chip is measured and characterized with continuous wave (CW), modulated signal and reliability measurements. With CW measurements, 1-dB compression point (P 1 dB) of 30.6 dBm and peak power added efficiency (PAE) of 45.2 % is achieved. For the modulated signal measurements, the amplifier is tested with 16-QAM 20 MHz LTE signal with peak-to-average-power ratio of 6.54 dB. The amplifier meets the stringent LTE specs with an adjacent channel power ratio (ACPR) less than-30 dBc for both EUTRA and UTRA1 with average output power of 27 dBm and PAE above 20 %. Owing to the voltage following between gate source junctions in the common-drain amplifier in addition to cascode structure of common source amplifier, the stress is significantly reduced at the transistor terminals. The reliability is demonstrated by operating the amplifier in nominal and worst voltage-standing-wave-ratio (VSWR) conditions.
Class-E CMOS RF Power Amplifier Using Voltage-Booster for Mobile Communication System
Efficiency enhancement techniques in switched Class-E power amplifier PA is usually obtained at the expense of the supply voltage. In cascode topology the supply voltage is limited by the breakdown voltage of the common-gate (CG) transistor. So voltage boosting technique is used at the CG to allow Radio Frequency (RF) swing at the gate to boost the biasing voltage above the supply voltage (VDD). This enables us to design the PA such that the cascode transistor has the same maximum drain-gate voltage. Consequently, larger signal swing will occurred at the output before encountering the breakdown. By using this combination, the gate of the NMOS is boosted above VDD and the power consumption is reduced. Simulation results using 0.13 m μ CMOS technology demonstrate 25.8 dBm output power with 38.8% Drain Efficiency at 2.4 GHz.