Low power shorted gate fin-FET based high performance amplifier (original) (raw)

2018 IEEE 8th Annual Computing and Communication Workshop and Conference (CCWC), 2018

Abstract

In mixed and analog signals circuit design, the overall performance of integrated circuits is extremely depended upon the performance of OP-AMP so the power consumption in OP-AMP is needs to be reduced. This requires minimum parasitic interconnection elements along with the reduction in internal supply voltage. In view of the requirements for low power and low voltage with highly efficient circuit, an ultra low power and low voltage two stage FinFET based OP-AMP with very high unity gain bandwidth (UGB) and high open loop gain (DC gain) is proposed to achieve fast settling requirements and accuracy. FinFET design is suitable for reducing short channel effects in lower technology node. In this work cascode technique is employed for attaining high open loop gain with quick settling time and the unity gain bandwidth is improved by the gain stage along the miller capacitor feedback path. The proposed FinFET based OP-AMP offers open loop gain of 92 dB, unity gain bandwidth of 230 MHz and having power consumption of only 15.43 μW. All the simulations are performed using Cadence in 45nm technology.

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