Phenomenological modeling of memristor fabricated through screen printing based on the structure of Ag/Polymer/Cu (original) (raw)
Related papers
Memristive devices based on mass printed organic resistive switching layers
Applied Physics A, 2021
Resistive random-access memory is a candidate for next-generation non-volatile memory architectures. In this study, we use flexographic roll-to-roll printing technology for deposition of the resistive layer, a printing method that allows fast and cost-effective fabrication to create non-volatile resistive memory devices. Metal-free organic polymers blends composed of poly(methyl methacrylate) (PMMA) and a surplus of poly(vinyl alcohol) (PVA) serve as the active layer. Microscopic studies of the roll-to-roll printed layers show circular domains of PMMA embedded in PVA. The influence of the PMMA content in the polymer blend is investigated with respect to the performance and reliability of the resistive memory cells. Electrical characterization reveals a retention time of at least eleven days, a Roff/Ron ratio of approx. two orders and write/erase voltages of + 1/−2 V.
Layered memristive and memcapacitive switches for printable electronics
Nature Materials, 2014
Novel computing technologies that imitate the principles of biological neural systems may o er low power consumption along with distinct cognitive and learning advantages 1,2. The development of reliable memristive devices capable of storing multiple states of information has opened up new applications such as neuromorphic circuits and adaptive systems 3,4. At the same time, the explosive growth of the printed electronics industry has expedited the search for advanced memory materials suitable for manufacturing flexible devices 5. Here, we demonstrate that solution-processed MoO x /MoS 2 and WO x /WS 2 heterostructures sandwiched between two printed silver electrodes exhibit an unprecedentedly large and tunable electrical resistance range from 10 2 to 10 8 combined with low programming voltages of 0.1-0.2 V. The bipolar resistive switching, with a concurrent capacitive contribution, is governed by an ultrathin (<3 nm) oxide layer. With strong nonlinearity in switching dynamics, di erent mechanisms of synaptic plasticity are implemented by applying a sequence of electrical pulses. Memristors were postulated as electrical resistance switches retaining a state based on the history of applied voltage and passed charge, followed by the introduction of the memcapacitor and meminductor 6. Inspired by Strukov's TiO 2 memristor concept 7 , a large class of metal oxides-along with less numerous halides, chalcogenides and organic polymers-have been studied as switching materials 3,4. Depending on the switching mechanism, these materials can be grouped into chemical switches, with anions or cations as mobile species producing a compositional gradient 8 , or physical switches, where only physical changes such as magnetic, ferroelectric, electron/hole trapping and phase-change processes are involved 3. State-of-the-art memristive devices exhibit programming times of nanoseconds, high switching ratios with multiple states, low energy consumption, high cycling endurance and retention times of several years 2,4. However, their flexible 9,10 , printable 11,12 and organic 13,14 counterparts show less impressive characteristics, with relatively high operating voltages above 2 V, small dynamic ranges limited to 10 2 , and insufficient electrical and mechanical reliability. Therefore, a strong need for high-performance memristors which fulfil the requirements imposed by system-in-foil technologies still remains. The emerging field of the characterization of two-dimensional (2D) materials has the potential to identify materials and composites with memory features that will outperform conventional bulk metal oxides. Layered transition metal dichalcogenides (TMDs) and transition metal oxides (TMOs) have attracted much attention
Journal of the Korean Physical Society, 2012
This brief demonstrates the promising feasibility of electrohydrodynamic (EHD) printing technology for the fabrication of a crossbar resistive switch (memristor) through the patterning of ITO as a bottom electrode and Ag as a top electrode. An ITO/ZrO2/Ag sandwich exhibiting reversible resistive switching (memristive) behavior has been demonstrated on a glass substrate. A physically layer-wise, electrical current-voltage (IV) characterization was done for the device fabricated using EHD printing. The device dimensions achieved in the current research were around 100 µm × 100 µm. The as-fabricated device showed a high ON/OFF ratio greater than 100000:1 with multiple operational voltages less than ±10 V. The measured retention time of the fabricated device was over 3 days. Results reveal that the current research work provides for the fabrication of a relatively low-cost memristive device with reversible resistive switching properties.
A Qualitative Study of Materials and Fabrication Methodologies for Two Terminal Memristive Systems
Materials Today: Proceedings, 2020
Though the concept of the thin film device, known by the name, memristors, as coined by Leon Chua, was theorized in 1971, it was only from the year 2008 that these thin film devices gained broader attention when R. Stanley Williams and his team demonstrated the first practical realization of the memristor at the HP labs. Memristors have been considered as the fourth fundamental circuit element, adding to resistors, capacitors and inductors. Among several other applications, the most unique application of memristors is that, while they occupy very little chip area, the synapses in the brain can be closely modeled using these devices. The memristive device from HP had two platinum electrodes on either side of a titanium dioxide (TiO 2) and oxygen deficient titanium dioxide (TiO 2-x) layers. The boundary separating the stoichiometric and oxygen deficient TiO 2 regions can be shifted on either side under the effect of an applied electric field. The current-voltage characteristics of this device from HP Labs exhibited a pinched hysteresis loop with a zero-crossing, depicting high resistance and low resistance states distinctly. Since the discovery at HP labs, researchers have reported several material choices for the electrodes and the active region (TiO 2-TiO 2-x). This paper presents a qualitative study on the material aspects of these nanoscale devices. Also, an exhaustive study of the different methodologies for fabricating such memristive systems is presented in this paper. These two terminal devices can be fabricated in a variety of ways but each method of fabrication has its own set of limitations since these devices operate at the nanoscale. The suitability of the single step and two step nano-imprint lithography (NIL) for memristors has been qualitatively examined in this paper.
Fabrication and testing of memristive devices
The 2010 International Joint Conference on Neural Networks (IJCNN), 2010
As semiconductor devices have shrunk further into the nanoscale regime, a new device, the memristor, has been discovered that has the potential to transform neuromorphic computing systems. This device is considered as the fourth fundamental circuit element. It was first theorized by Dr. Leon Chua in 1971 and has been discovered by HP labs in 2008. This paper describes initial efforts at fabricating the memristor devices and examining their properties. Two versions of memristor devices have been fabricated at the University of Dayton and the Air Force Research Laboratory utilizing varying thicknesses of the Ti02 dielectric layers. Our results show that the devices do exhibit the characteristic hysteresis loop in their I-V plots. Further refinement in the devices to achieve stronger hysteresis will be carried out as future work.
Applicability of Well-Established Memristive Models for Simulations of Resistive Switching Devices
IEEE Transactions on Circuits and Systems I: Regular Papers, 2014
Highly accurate and predictive models of resistive switching devices are needed to enable future memory and logic design. Widely used is the memristive modeling approach considering resistive switches as dynamical systems. Here we introduce three evaluation criteria for memristor models, checking for plausibility of the I-V characteristics, the presence of a sufficiently non-linearity of the switching kinetics, and the feasibility of predicting the behavior of two anti-serially connected devices correctly. We analyzed two classes of models: the first class comprises common linear memristor models and the second class widely used non-linear memristive models. The linear memristor models are based on Strukov's initial memristor model extended by different window functions, while the non-linear models include Pickett's physics-based memristor model and models derived thereof. This study reveals lacking predictivity of the first class of models, independent of the applied window function. Only the physics-based model is able to fulfill most of the basic evaluation criteria.
An Analytical Approach for Memristive Nanoarchitectures
As conventional memory technologies are challenged by their technological physical limits, emerging technologies driven by novel materials are becoming an attractive option for future memory architectures. Among these technologies, Resistive Memories (ReRAM) created new possibilities because of their nanofeatures and unique I–V characteristics. One particular problem that limits the maximum array size is interference from neighboring cells due to sneak-path currents. A possible device level solution to address this issue is to implement a memory array us-ing complementary resistive switches (CRS). Although the storage mechanism for a CRS is fundamentally different from what has been reported for memristors (low and high resistances), a CRS is simply formed by two series bipolar memristors with opposing polarities. In this paper, our intention is to introduce modeling principles that have been previously verified through measurements and extend the simulation principles based on memristors to CRSdevices and, hence, provide an analytical approach to the design of a CRS array. The presented approach creates the necessary design methodology platform that will assist designers in implementation of CRS devices in future systems.