Statistically enhanced analogue and mixed-signal design and test (original) (raw)
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2013 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2013
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Quality and Reliability Engineering International, 1993
There has been a great amount of publicity about Taguchi methods which employ deterministic sampling techniques for robust design. Also given wide exposition in the literature is tolerance design which achieves similar objectives but employs random sampling techniques. The question arises as to which approach-random or deterministic-is more suitable for robust design of integrated circuits. Robust design is a two-step process and quality analysis-the first step-involves the estimation of 'quality factors', which measure the effect of noise on the quality of system performance. This paper concentrates on the quality analysis of integrated circuits. A comparison is made between the deterministic sampling technique based on Taguchi's orthogonal arrays and the random sampling technique based on the Monte Carlo method, the objective being to determine which of the two gives more reliable (i.e. more consistent) estimates of quality factors. Results obtained indicated that the Monte Carlo method gave estimates of quality which were at least 40 per cent more consistent than orthogonal arrays. The accuracy of prediction of quality by Taguchi's orthogonal arrays is strongly affected by the choice of parameter quantization levels-a disadvantage-since there is a very large number (theoretically infinite) of choices of quantization levels for each parameter of an integrated circuit. The cost of the Monte Carlo method is independent of the dimensionality (number of designable parameters), being governed only by the confidence levels required for quality factors, whereas the size of orthogonal array required for a given problem is partly dependent on the number of circuit parameters. Two integrated circuits-a 7-parameter CMOS voltage reference and a 20-parameter bipolar operational amplifier-were employed in the investigation. Quality factors of interest included performance variability, acceptability (relative to customer specifications) and deviation from target. KEY WORDS Quality analysis Quality design Tolerance analysis Tolerance design Integrated circuit design Taguchi methods Robust design
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A statistical approach for design and testing of analog circuitry in low-cost SoCs
2010 53rd IEEE International Midwest Symposium on Circuits and Systems, 2010
A novel design-for-testability approach is proposed, which is derived from the aggressive probabilistic targets set forth for the yield and quality to be achieved in the massproduction of high-volume low-cost transceiver SoCs, thus requiring solutions that are fundamentally different from the traditional approaches. Statistical analysis is presented as the basis for the proposed approach, and specific guidelines are defined and demonstrated through examples. The proposed approach, based on built-in-self-testing (BIST) of RF/mixedsignal functions in the transceiver SoC, relies on digital processing resources that are typically available within the SoC at no additional cost and may aid in its testing and calibration. The important roles of characterization and built-in-selfcalibration and compensation in this context are also defined.
A Tool for Analog/RF BIST Evaluation Using Statistical Models of Circuit Parameters
ACM Transactions on Design Automation of Electronic Systems, 2015
Testing analog integrated circuits is expensive in terms of both test equipment and time. To reduce the cost, Design-For-Test techniques (DFT) such as Built-In Self-Test (BIST) have been developed. For a given Circuit Under Test (CUT), the choice of a suitable technique should be made at the design stage as a result of the analysis of test metrics such as test escapes and yield loss. However, it is very hard to carry out this estimation for analog/RF circuits by using fault simulation techniques. Instead, the estimation of parametric test metrics is made possible by Monte Carlo circuit-level simulations and the construction of statistical models. These models represent the output parameter space of the CUT in which the test metrics are defined. In addition, models of the input parameter space may be required to accelerate the simulations and obtain higher confidence in the DFT choices. In this work, we describe a methodological flow for the selection of most adequate statistical mod...