Energy-Efficient Computing for Extreme-Scale Science (original) (raw)
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Energy Efficiency For Extreme-Scale Computer Architecture
The era of single core processors is gone now. We are now using processors with upto 10 cores now days and we are moving towards integration levels of 1,000 core processor chips. The powerful obstacles which we are facing are power and energy consumption. To construct a multi core processor chip like this, there is a need to rebuild the whole compute stack from the ground up for energy and power efficiency. To achieve Extreme Scale Computing milestone, this is very important that we control power consumption. This is also very important that we operate the processor at lower voltage because this is the point of maximum energy efficiency. Unfortunately, in such type of environment, we have to handle huge process variation. However, it is very important to design voltage regulation efficiently, so that each region of the processor chip can operate at the most effective voltage and frequency levels. At the level of architecture, we need simple cores which are organized in a hierarchy of clusters. Furthermore, we also require techniques which can lessen the spillage of on-chip recollections and which can bring down the voltage protect groups of rationale. At long last, we additionally need to limit information development by the utilization of both equipment and programming systems. Notwithstanding we can get the required vitality efficiencies with an efficient approach that cuts over numerous layers of the processing stack.
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