Impact of the Ge Content on the Bandgap-Narrowing Induced Leakage Current of Recessed $\hbox{Si}{1 - x}\hbox{Ge}{x}$ Source/Drain Junctions (original) (raw)
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IEEE Transactions on Electron Devices, 2011
A study of the impact of the Ge content and the recess depth on the leakage current of strained Si 1−x Ge x /Si p + n heterojunctions is presented. A rise in the current, when the Ge content increases and/or the recess depth decreases, is experimentally observed. An analysis of the physical variables involved in the leakage current at low electric fields is carried out. The Shockley-Read-Hall lifetime is identified as the variable that affects the leakage current the most. Changes in the lifetimes are correlated to changes in the Ge content and the recess depth (Si 1−x Ge x thickness) by means of modifications of the stress levels. An expression that directly relates the values of the lifetimes with the germanium content is proposed.
IEEE Transactions on Electron Devices, 2011
A study of the impact of the Ge content and the recess depth on the leakage current of strained Si 1−x Ge x /Si p + n heterojunctions is presented. A rise in the current, when the Ge content increases and/or the recess depth decreases, is experimentally observed. An analysis of the physical variables involved in the leakage current at low electric fields is carried out. The Shockley-Read-Hall lifetime is identified as the variable that affects the leakage current the most. Changes in the lifetimes are correlated to changes in the Ge content and the recess depth (Si 1−x Ge x thickness) by means of modifications of the stress levels. An expression that directly relates the values of the lifetimes with the germanium content is proposed.
Germanium content dependence of the leakage current of recessed SiGe source/drain junctions
Journal of Materials Science: Materials in Electronics, 2007
The impact of the Ge fraction (x), on the leakage current of recessed Si 1-x Ge x p + -n source/drain junctions has been investigated, for a fixed recess depth of 70 nm. It is found that both the bulk and the peripheral leakage current density increase approximately exponentially with increasing Ge content in the range 10-30%. Roughly speaking, the leakage current density increases one decade for every 5% increase in Ge. In case of the bulk leakage current density, this enhancement is shown to be related to the increase in extended defects penetrating the depletion region in the n-type silicon substrate. Transmission Electron Microscopy demonstrates a higher density of dislocations at the epitaxial interface for a higher Ge fraction, which are most likely generated by strain relaxation, induced by the implantation and activation of B in the p + S/D regions.
Factors Influencing the Leakage Current in Embedded SiGe Source/Drain Junctions
IEEE Transactions on Electron Devices, 2000
This paper studies the leakage current components in embedded Si 1 −x Ge x source/drain (S/D) p + -n junctions, with different Ge contents, varying between 20% and 35%. In addition, the impact of performing a highly doped drain (HDD) implantation before or after the selective epitaxial deposition of in situ highly B-doped S/D layers is investigated. It is shown that the lowest junction leakage is obtained for the post-epi HDD condition, and moreover, for the smallest active area size. As pointed out, this dependence is related with a window-size-dependent strain relaxation, induced by the ion-implantation-related defects.
Stress analysis of Si1−xGex embedded source/drain junctions
Materials Science in Semiconductor Processing, 2008
The purpose of this paper is to evaluate the impact of the geometry of embedded Si 1Àx Ge x source/drain junctions on the stress field. Stress simulations were performed using TSUPREM4 2D software to further investigate the elastic strain relaxation as a function of Si 1Àx Ge x alloy active size, in the regime where no plastic relaxation is present. Moreover, the role of the epilayer thickness and the Ge content on the stress levels is also discussed. The work is complemented with experimental Raman spectroscopy.
Strain relaxation in transistor channels with embedded epitaxial silicon germanium source/drain
Applied Physics Letters, 2008
We report on the channel strain relaxation in transistors with embedded silicon germanium layer selectively grown in source and drain areas on recessed Si͑001͒. Nanobeam electron diffraction is used to characterize the local strain in the device channel. Our results show that strain is reduced in the device channel regions after implantation and thermal anneal.
Study of strain relaxation in Si/SiGe metal-oxide-semiconductor field-effect transistors
Journal of Applied Physics, 2005
We report a study of strained Si metal-oxide-semiconductor field-effect transistors (MOSFET's) fabricated using a high thermal budget. The impact of Si channel strain on MOSFET performance, leakage current and yield are investigated for Si 1-x Ge x virtual substrates having Ge compositions varying from 0 to 30%. Increasing the Ge fraction in the SiGe virtual substrate increases the amount of tensile strain in the Si layer and consequently increases the electron mobility. High levels of strain, however, reduce the critical thickness of strained Si, above which Si becomes metastable and susceptible to relaxation during high temperature device fabrication. Increasing the Ge composition in the virtual substrate up to 30% is shown to result in significant enhancements in MOSFET drain current and transconductance due to increased strain in the device channels. However, cross-wafer electrical yield data as a function of Ge composition is reported and shows that increasing Ge compositions above 15% simultaneously reduces device yield. Off-state leakage current and gate oxide interface trap density are also shown to increase significantly when the Ge content in the virtual substrate is raised above 25%. Trade-offs between device performance and wafer yield are thus presented. The results identify the appropriate parameter window for virtual substrate Ge composition if acceptable MOSFET on-state performance, off-state performance, device yield and reliability are to be achieved using a high thermal budget process. Detailed physical and electrical analyses have been carried out in order to understand the causes of the degraded performance for high Ge content virtual substrates. The reduction in yield with increasing Ge composition is shown to be related to a combination of strain relaxation and as-grown material quality. The strain state has been studied using Raman spectroscopy, Schimmel etching and