A multi-objective genetic algorithm for design space exploration in high-level synthesis (original) (raw)
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High-level synthesis with multi-objective genetic algorithm: A comparative encoding analysis
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The high-level synthesis process involves three interdependent and NP-complete optimization problems: (i) the operation scheduling, (ii) the resource allocation, and (iii) the controller synthesis. Evolutionary algorithms have been effectively applied to high level synthesis in presence conflicting design objectives for finding good tradeoffs in the design space. However, so far the design space exploration has been performed using single-objective evolutionary algorithms with an ad hoc fitness function to achieve the desired tradeoff between the objectives. Recently we proposed a framework based on multi-objective genetic algorithms to perform a fully automated design space exploration. In this paper we focus on the choice of the solution representations that can be used to perform the design space exploration with multi-objective genetic algorithms. In particular we consider two specific representations and compare them on a set of benchmark problems. Our results suggest that they have different biases on the search space that make them more effective in different problems and design subspaces. Accordingly, we present a preliminary investigation on a new representation that exploits the advantages of both of them.
Evolutionary Learning and Optimization, 2010
High-Level Synthesis (HLS) is the process of developing digital circuits from behavioral specifications. It involves three interdependent and NP-complete optimization problems: (i) the operation scheduling, (ii) the resource allocation, and (iii) the controller synthesis. Evolutionary Algorithms have been already effectively applied to HLS to find good solution in presence of conflicting design objectives. In this paper, we present an evolutionary approach to HLS that extends previous works in three respects: (i) we exploit the NSGA-II, a multi-objective genetic algorithm, to fully automate the design space exploration without the need of any human intervention, (ii) we replace the expensive evaluation process of candidate solutions with a quite accurate regression model, and (iii) we reduce the number of evaluations with a fitness inheritance scheme. We tested our approach on several benchmark problems. Our results suggest that all the enhancements introduced improve the overall performance of the evolutionary search.
Microelectronics Reliability, 2010
This paper introduces a novel approach to rapid Design Space Exploration (DSE) and presents a formalized High Level Synthesis (HLS) design flow with multi-parametric optimization objective using the same design space exploration approach. The proposed approach resolves issues related to DSE such as the precision of evaluation, time exhausted during evaluation and also automation of the exploration process. During DSE a conflicting situation always exists for the designer to concurrently maximize the accuracy of the exploration process and minimize the time spent during DSE analysis. This technique is capable of drastically reducing the number of architectural variants to be analyzed for accurate selection of the optimal design point in a short time. Unlike other proposed DSE approaches, the focus here is on determining the Priority Factor (PF) of the resources for final organization of the design space in increasing or decreasing order without requiring graphs or hierarchical tree arrangements to analyze the candidate variants. The proposed approach is capable of simultaneously optimizing many performance parameters viz. time of execution, power consumption, hardware area and cost. The DSE results for many benchmarks are presented along with a comparison with an existing DSE approach that uses the hierarchal structure method for architecture evaluation. Results indicated significant improvement in speedup compared to the existing approach.
Fitness inheritance in evolutionary and multi-objective high-level synthesis
2007
The high-level synthesis process allows the automatic design and implementation of digital circuits starting from a behavioral description. Evolutionary algorithms are very widely adopted to approach this problem or just part of it. Neverthless, some concerns regarding execution times exist. In evolutionary high-level synthesis, design solutions have to be evaluated to extract information about some figures of merit (such as performance, area, etc.) and to allow the genetic algorithm to evolve and converge to Pareto-optimal solutions. Since the execution time of such evaluations increases with the complexity of the specification, the overall methodology could lead to unacceptable execution time. This paper presents a model to exploit fitness inheritance in a multi-objective optimization algorithm (i.e. NSGA-II) by substituting the expensive real evaluations with estimations based on closeness in an hypothetical design space. The estimations are based on the measure of the distance between individuals and a weighted average of the fitnesses of the closest ones. The results shows that the Pareto-optimal set obtained by applying the proposed model well approximates the set obtained without fitness inheritance. Moreover, the overall execution time is reduced up to the 25% in average. 3459 1-4244-1340-0/07$25.00 c 2007 IEEE
An evolutionary-based algorithm to the module selection process in high-level synthesis
This paper proposes a new module selection algorithm for high-level synthesis. The algorithm uses an evolutionary approach to find the modules configuration set that satisfies design timing constraints while minimizing the total design cost (area). The algorithm has been incorporated in a well-characterized design space exploration strategy that aims to help designers to systematically find efficient implementation(s) of their designs that meet the design constraints . Incorporating module selection axis to the design space enable designers to evaluate large number of design alternatives by varying module selection and the latency or the resources required to implement the given design. We also present some experimental results for standard benchmarks to show the effectiveness of the algorithm.
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The objective of this project is to develop a software tool which assists in comparison of a work known as "M-GenESys: Multi Structure Genetic Algorithm based Design Space Exploration System for Integrated Scheduling, Allocation and Binding in High Level Synthesis" with another well established GA approach known as "A Generic Algorithm for the Design Space Exploration of Data paths During High-Level Synthesis". Two sets of software are developed based on both approaches using Microsoft Visual 2005 C# language. The C# language is an object-oriented language that is aimed at enabling programmers to quickly develop a wide range of applications on the Microsoft .NET platform. The goal of C# and the .NET platform is to shorten development time by freeing the developer from worrying about several low level plumbing issues such as memory equipment, type safety issues, building low level libraries, array bound checking, etc., thus allowing developers to actually spend th...
Simultaneous Scheduling and Allocation in High-Level Synthesis Using A Genetic Algorithm
2000
This paper describes a genetic algorithm applied to high-level hardware synthesis, generating a register transfer level circuit from a behavioral speci cation of a hardware system. High-Level synthesis consists of two combinatorial optimization problems; scheduling and allocation. It is also a multiple objective problem. Our GA solves the scheduling and allocation problems simultaneously so that it can successfully avoid falling into local minimums and cope with multiple objectives, giving di erent weight to tness functions. Several new ideas are involved in our paper. One is a straightforward method obtaining o spring e ciently using GA operations with a mechanism repairing faulty genes when creating o spring. E cient creation is crucial to an optimization problem with severe restrictions since most o spring violate the environment. When a gene violates the environment, it is replaced by the alternative parent gene or one of the available genes in order to repair the violating gene. Another idea is to di erentiate the circuits with the same tness to the environment from the viewpoint of closeness to the assumed optimal circuit. This di erentiation can strongly avoid premature convergence, wandering around a better solution through many generations. Using these ideas, our GA has succeeded in obtaining improved solutions, compared to other high level synthesis optimization techniques,for bench mark problems.
Hierarchical Synthesis of Embedded Systems Using Evolutionary Algorithms
Genetic Algorithms and Evolutionary Computation, 2003
In this chapter, we propose an approach for the synthesis of heterogenous embedded systems, including allocation and binding problems. For solving these in general NP-complete problems, Evolutionary Algorithms have been proven to provide good solutions for search spaces of moderate size. For realistic embedded system applications, however, two more challenges must be considered: a) the complexity of the search space, and b) the multi-objective nature of the optimization problem to solve. I.e., the desired result of system synthesis is a design space exploration that provides the set of so-called Pareto-optimal solutions or an approximation thereof instead of just a single solution. Here, we propose a solution based on a Multi-Objective Evolutionary Algorithm (MOEA) which denotes a class of Evolutionary Algorithms that have recently proposed for design space exploration problems. Secondly, in order to reduce the complexity of typical search spaces, we propose a hierarchical problem and solution structure.