Poly-SiGe-Based MEMS Thin-Film Encapsulation (original) (raw)
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Packaging of micro-electro-mechanical systems (MEMS) devices has proven to be costly and complex, and it has been a significant barrier to the commercialization of MEMS. We present a packaging solution applicable to several common MEMS devices, such as inertial sensors and micromechanical resonators. It involves deposition of a 20 μm layer of epi-polysilicon over unreleased devices to act as a
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In imec's 200mm fab a dedicated poly-SiGe above-IC MEMS (Micro Electro-Mechanical Systems) platform has been set up to integrate MEMS and its readout and driving electronics on one chip. In the Flemish project Gemini the possibilities of this platform have been further explored together with the project partners. Three different demonstrators were realized: mirrors for display applications, grating light valves (GLV) and accelerometers. Whereas the mirrors and GLVs are made with a ~300 nm thick SiGe structural layer plus optical coating, the SiGe structural layer thickness for the accelerometers is 4µm in order to improve the capacitive readout of in-plane devices. The processing and measurement results of these functional demonstrators are shown in this paper. These new demonstrators reconfirm the generic nature of the SiGe MEMS platform.
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Sensors, 2008
This paper discusses sputtered silicon encapsulation as a wafer level packaging approach for isolatable MEMS devices. Devices such as accelerometers, RF switches, inductors, and filters that do not require interaction with the surroundings to function, could thus be fully encapsulated at the wafer level after fabrication. A MEMSTech 50g capacitive accelerometer was used to demonstrate a sputtered encapsulation technique. Encapsulation with a very uniform surface profile was achieved using spin-on glass (SOG) as a sacrificial layer, SU-8 as base layer, RF sputtered silicon as main structural layer, eutectic gold-silicon as seal layer, and liquid crystal polymer (LCP) as outer encapsulant layer. SEM inspection and capacitance test indicated that the movable elements were released after encapsulation. Nanoindentation test confirmed that the encapsulated device is sufficiently robust to withstand a transfer molding process. Thus, an encapsulation technique that is robust, CMOS compatible, and economical has been successfully developed for packaging isolatable MEMS devices at the wafer level.
Wafer-level thin-film encapsulation for MEMS
Microelectronic Engineering, 2009
The diversity and complexity of many microelectromechanical systems (MEMS), combined with the mechanical nature of the devices involved, means that the handling, dicing and packaging of these structures can pose many problems. So-called 'zero-level' packaging options are now often used to protect the devices at the wafer scale before the wafer is diced and sent for conventional packaging. This paper describes a novel process flow for the fabrication of integrated MEMS thin-film packages within a lowtemperature, CMOS-compatible process. A double sacrificial layer is used, which encapsulates the device of interest within a shell of silicon oxide. The sacrificial layer is then removed through lateral etch channels and the shell is sealed. The technique requires minimal extra wafer space, allows the use of low-temperature materials within the process flow, and the novel channel design means that the shell may be easily sealed. Preliminary visual and electromechanical tests using simple fixed-fixed beam test structures indicate that the package is sealed, the device is undamaged and that encapsulation has little or no effect on device performance.
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2000
While packaging technology of conventional integrated circuits has already become more and more complex, packaging of MEMS sensors is particularly challenging. MEMS require a higher level of dedication given the fragility of the devices and the frequent need of a controlled atmosphere (e.g. gas mixture, overpressure or vacuum) in order to achieve the proper functionality of the devices. The actions taken to meet the desired specifications typically result in large, complicated and costly packages. The hermiticity of the package over the full life-time of the MEMS device is one of the largest challenges because of a large number of vacuum feedthroughs. Using the so-called indent-reflow sealing process, we have been able to demonstrate a hermetically-sealed on-chip vacuum package. As a result, a standard global package can be used.
Optimisation of PECVD poly-SiGe layers for MEMS post-processing on top of CMOS
Solid-State Sensors …, 2005
Poly-SiGe offers an attractive alternative for low temperature MEMS postprocessing above CMOS. This paper illustrates this fact through several investigations made to obtain a material with excellent mechanical properties (low stress, low stress gradient), and electrical properties (low resistivity) for different structural layer thicknesscs and deposition techniques. It was also established that these layers are stable with time and temperature variation, thus ensuring longterm stablility in the performance of poly-SiGe based MEMS devices.
Mechanical Design and Characterization for MEMS Thin-Film Packaging
Journal of Microelectromechanical Systems, 2012
In this paper, a thin-film packaging approach is developed. It is meant to provide microelectromechanical systems (MEMS) devices with hermetic encapsulation that is sufficiently strong for transfer molding. A flat slab structure supported by columns is considered as basic geometry for the mechanical model. It takes into account both the plate deflection and the stress at the interface with the columns. To verify the model validity, thin-film packages are fabricated using silicon nitride as material for the capping layer. Both high-and low-temperature processes are used to fabricate the packages. The packages differ for the diameter of the columns (from 2 μm to 28 μm), the distances between columns (from 20 μm to 100 μm), and the capping layer thickness (from 3 μm to 7 μm). The packages are tested at different pressures up to 12.5 MPa (125 bar). Failure points agree well with the mechanical model. The largest package fabricated is a square package of 300 μm side length and with four columns (10 μm diameter) in the middle. It withstands a pressure of 10 MPa with a thin SiN capping layer with a thickness of 6 μm. Moreover, the packages are carried through grinding, dicing, and transfer molding, demonstrating that the presented thin-film encapsulation approach is robust enough for commercial first-level packaging.
Enabling poly-SiGe MEMS scaling by improving anchor strength and resistance
Microelectronic Engineering, 2011
Poly-SiGe can be used to process Micro Electro-Mechanical Systems (MEMS) directly above standard CMOS. In this work, the use of different surface pre-treatments, such as a CF 4 clean or a Ti/TiN metallic interlayer, to remove unwanted interfacial oxide between a poly-SiGe MEMS structural layer and a poly-SiGe MEMS electrode in the anchor region, is explored. The effect of these treatments on anchor strength and resistivity is studied. Also the effect of the anchor design itself, on the overall anchor characteristics, is investigated. Both the CF 4 pre-deposition treatment and the Ti/TiN interlayer are found to improve the anchor resistance and strength of the SiGe-SiGe anchors. In addition, using a Ti/TiN layer has the benefit of a lower strain gradient non-uniformity compared to using the CF 4 clean.