A low-phase-noise 5-GHz CMOS quadrature VCO using superharmonic coupling (original) (raw)
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A 4.8GHz Low-Phase Noise Quadrature Colpitts VCO
2006 International Symposium on VLSI Design, Automation and Test, 2006
A 4.8GHz low-noise quadrature Colpitts VCO is second-order harmonic coupling to enforce the quadrature presented. Use of the current switching differential Colpitts relation between two oscillators. Using the cross-coupled pair configuration together with superharmonic coupling scheme LC VCO's, this technique has been used to generate for quadrature signal generation ensures low phase noise quadrature over a wide tuning range without suffering from an operation. The advantage of proposed differential VCO is increase in power consumption or phase noise. However, it analyzed in terms of power consumption, phase noise, and has not been applied to the noise-shifting differential Colpitts figure of merit. The QVCO has been fabricated with the VCO to generate quadrature output. 0.1 8um TSMC CMOS technology for 4.8GHz band operation In this paper we therefore combine the above two and the obtained phase noise is -120 dBc/Hz at 1MHz offset techniques, noise-shifting differential Colpitts oscillators and frequency while 7mA current consumption and 12.6mW superharmonic coupling, to create a new oscillator topology to power consumption from 1.8V power supply.
IEEE Transactions on Circuits and Systems II: Express Briefs, 2012
A modified coupled method for multiphase oscillator is proposed and demonstrated in a standard 0.18-μm CMOS technology. A self-injection-coupled (SIC) technique is used to couple two current-reused differential voltage-controlled oscillators (VCOs). Compared with the conventional parallel-coupled quadrature VCO (QVCO), the proposed QVCO using the SIC technique presents low phase noise without increasing dc power consumption. The proposed SIC-QVCO at 16.28 GHz demonstrated a low phase noise of −125 dBc/Hz at 1-MHz offset frequency and a tuning range of 290 MHz. The dc supply voltage and current consumption are 1.8 V and 6 mA, respectively. The chip size of the proposed SIC-QVCO is 0.75 × 0.6 mm 2 .
Analysis and Design of a CMOS Phase-Tunable Injection-Coupled LC Quadrature VCO (PTIC-QVCO)
IEEE Journal of Solid-State Circuits, 2009
This paper presents the design, analysis, and characterization of a low-power, low-phase-noise, phase-tunable injection-coupled LC quadrature oscillator (PTIC-QVCO). Two LC VCOs are superharmonically coupled in quadrature phase via a frequency doubler that injects a synchronizing signal at the common source node of the negative transconductor stage. Conceptual and analytical models of the circuit are introduced to derive the conditions for quadrature operation and examine the circuit parameters affecting the phase imbalance due to mismatched VCOs. Additionally, a tunable tail filter (TTF) is incorporated to calibrate the residual quadrature imbalance in presence of a 3-variation in the device parameters and drive the oscillator to its optimum phase noise performance. To validate the proposed approach, measurements have been carried out on a 9 GHz prototype implemented in a 0.18 m RF CMOS process. With core current consumption of 5 mA at 1.8 V supply voltage, the circuit achieves a measured phase noise figure-of-merit ranging from 177.3 to 182.6 dBc/Hz at 3 MHz offset along the 9.0 to 9.6 GHz frequency tuning range. Quadrature phase correction of 11 0 at 9 GHz is demonstrated.
Analysis and Design of a Double-Quadrature CMOS VCO for Subharmonic Mixing at $Ka$-Band
IEEE Transactions on Microwave Theory and Techniques, 2008
In this paper, we analyze the potentials of a four-phase 14-GHz CMOS voltage-controlled oscillator, tailored to a subharmonic receiver, for signal processing at-band. When mild phase accuracies between in-phase and quadrature down-converted signals are required, the four-phase oscillator displays roughly the same phase noise figure-of-merit as quadrature oscillator counterparts. However, the operation at half-frequency leads to an improved performance due to a higher quality factor of the tuning varactors, and because the local oscillator circuitry and signal path run at different frequencies, relaxing coupling issues. A detailed time-variant analysis of phase noise in multiphase oscillators is introduced and validated by both simulations and experiments. Prototypes realized in a 65-nm technology occupy an active area of 0.5 mm 2 and show the following performances: a 26% frequency tuning range (from 12.2 to 15.9 GHz), maximum phase error from 4 of 2 , and a phase noise of 110 dBc/Hz at 1 MHz from 14 GHz, while consuming 18 mA from 0.8-V supply.
Analysis and design of a 1.8GHz CMOS LC quadrature VCO
IEEE Journal of Solid-state Circuits, 2002
This paper presents a quadrature voltage-controlled oscillator (QVCO) based on the coupling of two LC-tank VCOs. A simplified theoretical analysis for the oscillation frequency and phase noise displayed by the QVCO in the 1 3 region is developed, and good agreement is found between theory and simulation results. A prototype for the QVCO was implemented in a 0.35m CMOS process with three standard metal layers. The QVCO could be tuned between 1.64 and 1.97 GHz, and showed a phase noise of 140 dBc/Hz or less across the tuning range at a 3-MHz offset frequency from the carrier, for a current consumption of 25 mA from a 2-V power supply. The equivalent phase error between I and Q signals was at most 0.25 .
Very low noise current- shaped optimally coupled CMOS LC quadrature VCO
IEICE Electronics Express, 2010
This paper presents a new low phase noise quadrature voltage-controlled oscillator (QVCO). Coupling phase shifts of 90 • in conjunction with center-tapped capacitor impedance transformers are exploited to optimally couple two VCOs. DC and AC path of the switching and coupling pairs are de-coupled to allow operation in saturation for large oscillation amplitudes. The switching and coupling transistor pairs operate in class-C mode which increases the DC to RF efficiency. Also, these transistors alternate from strong inversion to accumulation region, decreasing the intrinsic device flicker noise. Simulations confirm the superiority of the proposed circuit in comparison with the prior published QVCOs in terms of phase noise performance.
IEEE Journal of Solid-state Circuits, 2002
The tuning curve of an LC-tuned voltage-controlled oscillator (VCO) substantially deviates from the ideal curve 1 ( ) when a varactor with an abrupt ( ) characteristic is adopted and the full oscillator swing is applied directly across the varactor. The tuning curve becomes strongly dependent on the oscillator bias current. As a result, the practical tuning range is reduced and the upconverted flicker noise of the bias current dominates the 1 3 close-in phase noise, even if the waveform symmetry has been assured. A first-order estimation of the tuning curve for MOS-varactor-tuned VCOs is provided. Based on this result, a simplified phase-noise model for double cross-coupled VCOs is derived. This model can be easily adapted to cover other LC-tuned oscillator topologies. The theoretical analyses are experimentally validated with a 0.25m CMOS fully integrated VCO for 5-GHz wireless LAN receivers. By eliminating the bias current generator in a second oscillator, the close-in phase noise improves by 10 dB and features 70 dBc/Hz at 10-kHz offset. The 1 2 noise is 132 dBc/Hz at 3-MHz offset. The tuning range spans from 4.6 to 5.7 GHz (21%) and the current consumption is 2.9 mA.
DESIGN OF CMOS QUADRATURE VCO USING ON-CHIP TRANS-DIRECTIONAL COUPLERS
Progress in Electromagnetics Research-pier, 2010
This work presents a quadrature voltage-controlled oscillator (QVCO) realized by on-chip trans-directional (TRD) couplers. The TRD coupler is implemented by sections of parallelcoupled lines connected by shunt capacitors periodically.
A Comprehensive Analysis of Quadrature Signal Synthesis in Cross-Coupled RF VCOs
IEEE Transactions on Circuits and Systems I: Regular Papers, 2007
This paper presents a linear model for cross-coupled quadrature voltage-controlled oscillators (QVCOs) together with a simple generalized proof for the condition of quadrature oscillation. The analysis provides insight into the oscillation mechanism and the previously observed frequency shift when the magnitude and phase of the coupling signal are deliberately modified by a complex coupling coefficient. It is demonstrated that the steady-state oscillation condition = 1 holds only if is replaced by an effective large-signal transconductance e that is a function of the coupling transconductance and the imaginary part of. Closed-form expressions for the phase imbalance and amplitude error in presence of mismatch between the LC tank circuits as well as device transconductances are also derived. We introduce the new concept of quadrature resistance/quadrature conductance (quad quad), an incremental element synthesized by the coupling transistors, and show that its magnitude is responsible for the frequency shift and quadrature oscillation. A one-port model of the QVCO is studied and the loading effect of quad on the tank is examined. Particularly, it is shown that quad degrades the open-loop quality factor and worsens the phase noise. The analysis in this paper can be applied to most QVCO topologies presented in the literature.
A Wideband Quadrature VCO Using a Novel Tail Current-Clipping Technique
2017
This thesis presents a Quadrature VCO (QVCO) architecture using a novel tail currentclipping technique that improves the phase noise performance of a traditional QVCO by about 4 dB while obtaining a tuning range of about 4 to 5 GHz. This work introduces an innovative idea based on a new approach of implementing a QVCO without an explicit conventional parallel or series coupling network and eliminates some of the issues associated with a traditional QVCO such as bimodal oscillations and phase noise degradation due to the coupling network. The proposed structure has a lot of advantages over the traditional P-QVCO in terms of both phase noise and power consumption. The proposed QVCO was fabricated in the 40 nm CMOS technology. The measured phase noise at 4.9 GHz was about-123.2 dBc/Hz at 1 MHz offset frequency while the quadrature error was less than 3 • over the complete tuning range. The proposed architecture consumes a power of about 7.