Influence of the architecture on ADC error modeling (original) (raw)

A State of the Art on ADC Error Compensation Methods

IEEE Transactions on Instrumentation and Measurement, 2005

Analog-to-digital converters (ADCs) are critical components of signal-processing systems. ADC errors can compromise the overall accuracy and the effectiveness of the whole system. This leads researchers to direct increasing attention to error correction topics. In this paper, some ADC error compensation methods are briefly introduced according to a classification criterion based on the main research trends.

Accurate Prediction of Analog-to-Digital Converter Performance After Post-Correction

2006

Analog-to-digital converter additive postcorrection using look-up-tables is considered. An accurate expression is provided that predicts the ADC performance after correction. The expression depends on differential nonlinearity, random noise variance, and the numerical precision of the correction terms. The theory shows good agreement when compared with simulations and experimental converter data.

Fault-sensitivity analysis and reliability enhancement of analog-to-digital converters

IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2000

Reliability of systems used in space, avionic and biomedical applications is highly critical. Such systems consist of an analog front-end to collect data, an Analog-to-Digital Converter (ADC) to convert the collected data to digital form and a digital unit to process it. Though considerable amount of research has been performed to increase the reliability of digital blocks, the same can not be claimed for mixed signal blocks. The reliability enhancement which we employ starts with fault sensitivity analysis followed by redesign. The data obtained from the sensitivity analysis is used to grade blocks based on their sensitivity to faults. The highly sensitive blocks can then be replaced by more reliable alternatives. The improvement gained by opting for more robust implementations might be limited due to the number of possible implementations. In these cases alternative reliability enhancement techniques such as adding redundancy may provide further improvements. The steps involved in the reliability enhancement of ADCs are illustrated in this paper by first proposing a sensitivity analysis methodology for α-particle induced transients and then suggesting redesign techniques to improve the reliability of the ADC. A novel concept of node weights specific to α-particle transients is introduced which improves the accuracy of the sensitivity analysis. The fault simulations show that, using techniques such as alternative robust implementations, adding redundancy, pattern detection and transistor sizing, considerable improvements in reliability can be attained.

Bounds on the performance of analog-to-digital converter look-up table post-correction

Measurement, 2009

Analog-to-digital converter additive post-correction using look-up tables is considered. The problem of successfully predicting the converter's performance after correction is treated in particular. An accurate expression is provided that predicts the ADC performance after correction. The expression depends on differential non-linearity, random noise variance, and the numerical precision of the correction terms. The theory shows good agreement when compared with simulations and experimental converter data. The results are useful when designing systems involving ADCs and post-correction, since the performance parameters can be obtained with knowledge of a few ADC intrinsic parameters and the correction system resolution.

Incorporating fault tolerance in analog-to-digital converters (ADCs)

isqed, 2002

The reliability of ADCs used in highly critical systems can be increased by applying a two-step procedure start-ing with sensitivity analysis followed by redesign. The sensitivity analysis is used to identify the most sen-sitive blocks which could then be redesigned for better ...

A Histogram-Based Static-Error Correction Technique for Flash ADCs

2015

Abstract: High-speed, high-accuracy data converters are attractive for use in most RF applications. Such converters allow direct conversion to occur between the digital baseband and the antenna. However, high speed and high accuracy make the analog components in a converter more complex, and this complexity causes more power to be dissipated than if a traditional approach were taken. A static calibration technique for flash analog-to-digital converters (ADCs) is discussed in this paper.

A-to-D converters static error detection from dynamic parameter measurement

Microelectronics Journal, 2003

A complete characterisation of ADC requires the estimation of two kinds of performances, static and dynamic parameters. Each set of items is extracted from a different test procedure, involving high test cost. As both groups of parameters reflect the converter behaviour, there should be a link between each other. This paper investigates whether the correlation between ADC static and dynamic parameters could enable to deduce the whole set of performances from a single dynamic test procedure, leading to shorter processing time and reduced hardware resources. The influence of static errors on the classical dynamic parameters is thus studied for different ADC resolutions. It is shown that under appropriate test conditions, the variations of dynamic parameters under static errors impact are significant enough to allow the detection of ADC offset, gain and non-linearity errors. q

Dynamic Error Correction of Integrating Analog-to-Digital Converters Using Volterra Filtration

In analog-to-digital converters (ADCs), dynamic and memory nonlinear effects can contribute simultaneously to the distortion of the digitised signal. These effects can be modelled and compensated effectively via Volterra filters. The paper deals with a Volterra filter for ADC error correction based on an inverse model. An easy-to-implement correction technique, based on a efficient mathematical model of Volterra filter designed to reduce burden in model definition, in filter identification, and in experimental calibration is proposed. Preliminary simulation and experimental results for integrating ADCs highlight the effectiveness of the proposed modelling and correction approach.

A state of the art on ADC modelling

Computer Standards & Interfaces, 2004

The state of the art of the research on modelling of analog-to-digital converter-based measuring devices is surveyed. Main topics of modelling are reviewed according to the fields of prevailing scientific interest in metrological research such as quantization models, error models, and correction-aimed models. In these fields, recent developments are analysed with the aim of focusing both the contemporary situation and the imminent trends.