Linking EUV lithography line edge roughness and 16nm NAND memory performance (original) (raw)
Applied Optics, 2004
The control of line-edge roughness ͑LER͒ of features printed in photoresist poses significant challenges to next-generation lithography techniques such as extreme-ultraviolet ͑EUV͒ lithography. Achieving adequately low LER levels requires accurate resist characterization as well as the ability to separate resist effects from other potential contributors to LER. One potentially significant contributor to LER arises from roughness on the mask coupling to speckle in the aerial image and consequently to LER in the printed image. Here I numerically study mask surface roughness and phase roughness to resist LER coupling both as a function of illumination coherence and defocus. Moreover, the potential consequences of this mask effect for recent EUV lithography experiments is studied through direct comparison with experimental through-focus printing data collected at a variety of coherence settings. Finally, the effect that mask roughness will play in upcoming 0.3-numerical-aperture resist testing is considered.
Modeling the transfer of line edge roughness from an EUV mask to the wafer | NIST
2011
Contributions to line edge roughness (LER) from extreme ultraviolet (EUV) masks have recently been shown to be an issue of concern for both the accuracy of current resist evaluation tests as well the ultimate LER requirements for the 22 nm production node. More recently, it has been shown that the power spectral density of the mask-induced roughness is markedly different than that of intrinsic resist roughness and thus potentially serves as a mechanism for distinguishing mask effects from resist effects in experimental results. But the evaluation of stochastic effects in the resist itself demonstrate that such a test would only be viable in cases where the resist effects are completely negligible in terms of their contribution to the total LER compared to the mask effects. Also the results presented here lead us to the surprising conclusion that it is indeed possible for mask contributors to be the dominant source of LER while the spatial characteristics of the LER remain indistinguishable from the fractal characteristics of resist-induced LER.
Applied Optics, 2009
As critical dimensions for leading-edge semiconductor devices shrink, the line-edge roughness (LER) requirements are pushing well into the single digit nanometer regime. At these scales many new sources of LER must be considered. In the case of extreme ultraviolet (EUV) lithography, modeling has shown the lithographic mask to be a source of significant concern. Here we present a correlation-based methodology for experimentally measuring the magnitude of mask contributors to printed LER. The method is applied to recent printing results from a 0.3 numerical aperture EUV microfield exposure tool. The measurements demonstrate that such effects are indeed present and of significant magnitude. The method is also used to explore the effects of illumination coherence and defocus and has been used to verify model-based predictions of mask-induced LER.
Microelectronics Reliability, 2012
The only way to keep pace with Moore's Law is to use probabilistic computing for memory design. Probabilistic computing is 'unavoidable', especially when scaled memory dimensions go down to the levels where variability takes over. In order to print features below 20 nm, novel lithographies such as Extreme Ultra Violet (EUV) are required. However, transistor structures and memory arrays are strongly affected by pattern roughness caused by the randomness of such lithography, leading to variability induced data errors in the memory read-out. This paper demonstrates a probabilistic-holistic look at how to handle bit errors of NAND Flash memory and trades-off between lithography processes and error-correcting codes to ensure the data integrity.
Minimization and control of line-edge roughness (LER) and contact-edge roughness (CER) is one of the current challenges limiting EUV line-space and contact hole printability. One significant contributor to feature roughness and CD variability in EUV is photon shot noise (PSN); others are the physical and chemical processes in photoresists, known as resist stochastic effect. Different approaches are available to mitigate each of these contributions. In order to facilitate this mitigation, it is important to assess the magnitude of each of these contributions separately from others. In this paper, we present and test a computational approach based on the concept of an 'ideal resist'. An ideal resist is assumed to be devoid of all resist stochastic effects. Hence, such an ideal resist can only be simulated as an 'ideal resist model' (IRM) through explicit utilization of the Poisson statistics of PSN 2 or direct Monte Carlo simulation of photon absorption in resist. LER estimated using IRM, thus quantifies the exclusive contribution of PSN to LER. The result of the simulation study done using IRM indicates higher magnitude of contribution (60%) from PSN to LER with respect to total or final LER for a sufficiently optimized high dose 'state of the art' EUV chemically amplified resist (CAR) model.
Controlling linewidth roughness in step and flash imprint lithography
2008
Despite the remarkable progress made in extending optical lithography to deep sub-wavelength imaging, the limit for the technology seems imminent. At 22nm half pitch design rules, neither very high NA tools (NA 1.6), nor techniques such as double patterning are likely to be sufficient. One of the key challenges in patterning features with these dimensions is the ability to minimize feature roughness while maintaining reasonable process throughput. This limitation is particularly challenging for electron and photon based NGL technologies, where fast chemically amplified resists are used to define the patterned images. Control of linewidth roughness (LWR) is critical, since it adversely affects device speed and timing in CMOS circuits. Three experiments were performed documenting LWR in the template, imprint, and after pattern transfer. On average, LWR was extremely low (less than 3nm, 3σ), and independent of the processing step and feature size.
Effect of mask-roughness on printed contact-size variation in extreme-ultraviolet lithography
Applied Optics, 2005
Relying on reflective mask technology, extreme-ultraviolet (EUV) lithography is particularly vulnerable to mask substrate roughness. Previous research has shown mask roughness to play a significant role in printed line-edge roughness (LER). Here the analysis of mask-roughness effects is extended to printed contact-size variations. Unlike LER, illumination partial coherence is found to have little affect on the results for contacts that are near the diffraction limit. Analysis shows that, given the current state-ofthe-art EUV mask, mask roughness has a significant effect on the process window for small contacts. The analysis also shows that a significant portion of the contact-size variation observed in recent 0.1numerical-aperture EUV exposures can be attributed to the mask-roughness effect studied here.
Controlling linewidth roughness in step and flash imprint lithography
24th European Mask and Lithography Conference, 2008
Despite the remarkable progress made in extending optical lithography to deep sub-wavelength imaging, the limit for the technology seems imminent. At 22nm half pitch design rules, neither very high NA tools (NA 1.6), nor techniques such as double patterning are likely to be sufficient. One of the key challenges in patterning features with these dimensions is the ability to minimize feature roughness while maintaining reasonable process throughput. This limitation is particularly challenging for electron and photon based NGL technologies, where fast chemically amplified resists are used to define the patterned images. Control of linewidth roughness (LWR) is critical, since it adversely affects device speed and timing in CMOS circuits. Three experiments were performed documenting LWR in the template, imprint, and after pattern transfer. On average, LWR was extremely low (less than 3nm, 3σ), and independent of the processing step and feature size.
Appl Opt, 2004
The control of line-edge roughness ͑LER͒ of features printed in photoresist poses significant challenges to next-generation lithography techniques such as extreme-ultraviolet ͑EUV͒ lithography. Achieving adequately low LER levels will require accurate resist characterization as well as the ability to separate resist effects from other potential contributors to LER. One significant potential contributor is LER on the mask. Here we explicitly study the mask to resist LER coupling using both analytical and computersimulation methods. We present what is to our knowledge a new imaging transfer function referred to as the LER transfer function ͑LTF͒, which fundamentally differs from both the conventional modulation transfer function and the optical transfer function. Moreover, we present experimental results demonstrating the impact of current EUV masks on projection-lithography-based LER experiments.
IEEE Transactions on Plasma Science, 2009
We present 3-D modeling results on resist line-edgeroughness (LER) transfer to underlying films during plasma etching. After generating random fractal resist sidewalls with controlled roughness parameters, we model and contrast the nanoscale roughness phenomena for both resist and underlayer sidewalls in a two-layer stack using two different plasma processes in three scenarios: 1) pattern transfer; 2) resist trimming; and 3) resist trimming followed by pattern transfer. In the pattern transfer process, etching is considered ion driven and anisotropic. The protrusions of the rough, trimmed or nontrimmed, resist sidewall act as a shadowing mask for the incident ions. It is found that shadowing of ions is enough to induce the, well known by experiments, striations at the sidewalls of both the underlayer and the resist. Pattern transfer induces a decrease of rms roughness but has no important effects on the correlation length. In the trimming process, the evolution of the resist sidewall is modeled with an isotropic etching process not affecting the underlayer. The trimming process causes a decrease of the rms value of the resist sidewall and an increase of its correlation length and roughness exponent. For sufficiently long trimming times, the change of LER parameters becomes less intense. In the case of trimming followed by pattern transfer, the striations of the underlayer widen with trimming time, and pattern transfer further reduces all LER parameters. The effect of trimming on the rms roughness of the underlayer is important in the case of initially anisotropic resist sidewall. For both trimming and pattern transfer, a stronger relative reduction on rms roughness of both the resist and the underlayer sidewalls is obtained for smaller correlation length and larger rms roughness of the initial resist.