Design of SIPC-based complementary LC-QVCO in 0.18- µ m CMOS technology for WiMAX application (original) (raw)

Low Phase Noise Wide Tuning Range LC Oscillator for RF Application Using Varactor Bank

Journal of Telecommunication, Electronic and Computer Engineering, 2019

This paper presents the design of a QVCO (Quadrature voltage controlled oscillator) with high tuning range and low phase noise for Radio Frequency applications. The proposed VCO has been designed to produce quadrature signal by using cross coupled topology. Extra pair of MOSFETS are added to improve the quality factor of the LC tank, which helps to improve the phase noise. The tuning range of VCO ranges from 3.8 GHz to 4.52 GHz, which is nearly 20%. Additionally, the obtained phase noise is -120.31 dBc/Hz at 1MHz offset frequency. The observed power dissipation is 13.21 mW.

Techniques of Power Phase-Noise Optimization of 2.4 / 4.8 GHz CMOS VCO with Switched Capacitor Array Using Bondwire Inductor

Bonfring

This paper presents theoretical analysis of the maximum operating frequency of proposed Source Degeneration (SD) and Conventional CML D-Latch are estimated. The approach is based on the voltage transfer function, which is derived from small signal model of the circuit. Design approach with pre and post layout simulation results have been presented in detail and compared the performance in terms of power consumption, self oscillation frequency, sensitivity and supply voltage. With example shows the, all pMOS Voltage Controlled Oscilaator (VCO) with MOS capacitor switched capacitor array (SCA) generates the high frequency sinewave reference signals fed in to both divider for to get quadrature (Q) sinewave signals. Off Chip Bondwire inductor is used instead of on chip spiral inductor in all-pMOS VCO as it have high quality factor. Also, it will neglect the variations of carrier frequency and it gives additional performance like phase noise, power consumption, area than using spiral inductor. Even if use spiral inductor in all-pMOS VCO, Bondwire inductor also presents due to low impedance path between drain and ground terminal. Various optimization techniques are implemented while designing a QVCO, which facilitates is used to achieve a low power low phase noise performance. Compared to other types of QVCO, the conventional QVCO shows good phase noise performance than normally achieved 6 dB phase noise improvement with carrier frequency. The simulated results shows about 5 dB, 4 dB, 4 dB and 4 dB of phase noise improvement at 10 kHz, 100 kHz, 1 MHz and 3 MHz offset frequency from the 2.4 GHz carrier frequency. This combinational topology doesn?t consume additional power and area than others and shows with improved phase noise performance. The pre and post layout simulation results are compared of both proposed (SD) and conventional QVCO, which is designed in 180 nm CMOS technology as 1V.