Optical Wavelet Transform Processor (original) (raw)
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Two-dimensional wavelet processor
Applied Optics, 1996
An optical implementation of the two-dimensional ͑2-D͒ wavelet transform and inverse wavelet transform is performed in real time by the exploitation of a new multichannel system that processes the different daughter wavelets separately. The so-coined wavelet-processor system relies on a multichannel replication array generated that uses a Dammann grating and is able to handle every wavelet function. All channels process in parallel using a conventional 2-D correlator. Experimental results applying the Mexican-hat wavelet-decomposition technique are presented.
Real-time optical 2D wavelet transform based on the JPEG2000 standards
The European Physical Journal Applied Physics, 2008
In image processing, the Wavelet Transform (WT) is largely used. However, time requirements for large two-dimensional image transforms are hard to meet with sequential implementations. Parallel implementation decreases the processing time and allows to reach a real-time operation in image coding. Unfortunately, this parallel coding increases the hardware complexity. We propose an optical implementation of the JPEG2000 compression using a special implementation of the WT. Special attention is paid to propose a simple all optical setup carrying out the optical implementation of JPEG2000 compression for gray-level images. Finally, an adaptation of our technique to colored images is proposed.
Two-dimensional wavelet transform by wavelength multiplexing
Applied Optics, 1996
The wavelet transform is a useful tool for data compression, analysis of short transient pulses, optical correlators, etc. This transform was obtained optically by the use of the spatial or temporal multiplexing approaches. A two-dimensional wavelet transform is obtained with only one spatial channel. The information of the different scalings is carried in different wavelengths and summed incoherently at the output plane. Laboratory experimental results are demonstrated.
Architectures for wavelet transforms: A survey
Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology, 1996
Wavelet transforms have proven to be useful tools for several applications, including signal analysis, signal compression and numerical analysis. This paper surveys the VLSI architectures that have been proposed for computing the Discrete and Continuous Wavelet Transforms for 1-D and 2-D signals. The architectures are based upon on-line versions of the wavelet transform algorithms. These architectures support single chip implementations and are optimal with respect to both area and time under the word-serial model.
Hardware Architecture for the Implementation of the Discrete Wavelet Transform in two Dimensions
Ingeniería y Competitividad, 2014
Resumen El artículo presenta una arquitectura hardware que desarrolla la transformada Wavelet en dos dimensiones sobre una FPGA, en el diseño se buscó un balance entre número de celdas lógicas requeridas y la velocidad de procesamiento. El artículo inicia con una revisión de trabajos previos, después se presentan los fundamentos teóricos de la transformación, posteriormente se presenta la arquitectura propuesta seguida por un análisis comparativo. El sistema se implementó en la FPGA Ciclone II EP2C35F672C6 de Altera utilizando un diseño soportado en el sistema Nios II.
Optical wavelet transform by the phase-only joint-transform correlator
Applied Optics, 1996
A method is presented that performs the optical wavelet transform with liquid-crystal televisions as spatial light modulators operating only on the phase of the incident coherent light. The architecture is the joint-transform correlator, and the wavelets and the image to be transformed are encoded in the input plane of the system. The mathematical formalism describing the adaptation of the jointtransform correlator to the wavelet transform is given and extended to the operation of the phase-only joint-transform correlator. A new wavelet is described for two-dimensional image processing, and experimental results are presented for optical wavelet transforms done in real time by use of this wavelet in the phase-only joint-transform-correlator architecture. The analysis is extended to multiwavelet 1multispectral2 analysis by the joint-transform correlator, and simulation results are given. Finally, experimental results with the phase-only joint-transform correlator applied to multiwavelet analysis are presented.
1995
This paper presents a wide range of algorithms and architectures for computing the 1-D and 2-D Discrete Wavelet Transform (DWT), and the 1-D and 2-D Continuous Wavelet Transform (CWT). The algorithms and architectures presented here are independent of the size and nature of the wavelet function. New on-line algorithms are proposed for the DWT and the CWT which require signi cantly small storage. The proposed systolic array and the parallel lter architectures implement these on-line algorithms, and are optimal both with respect to area and time (under the word-serial model). Moreover, these architectures are very regular, and support single chip implementations in VLSI. The proposed SIMD architectures implement the existing pyramid and a'trous algorithms, and are optimal with respect to time.
Ultra-High Performance and Low-Cost Architecture of Discrete Wavelet Transforms
2020
This work targets the challenging issue to produce high throughput and low-cost configurable architecture of Discrete wavelet transforms (DWT). More specifically, it proposes a new hardware architecture of the first and second generation of DWT using a modified multi-resolution tree. This approach is based on serializations and interleaving of data between different stages. The designed architecture is massively parallelized and sharing hardware between low-pass and high-pass filters in the wavelet transformation algorithm. Consequently, to process data in high speed and decrease hardware usage. The different steps of the post/pre-synthesis configurable algorithm are detailed in this paper. A modulization in VHDL at RTL level and implementation of the designed architecture on FPGA technology in a NexysVideo board (Artix 7 FPGA) are done in this work, where the performance, the configurability and the generic of our architecture are highly enhanced. The implementation results indicat...