Evaluations of intrinsic time dependent dielectric breakdown of dielectric copper diffusion barriers (original) (raw)
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Comparison of characteristics and integration of copper diffusion-barrier dielectrics
Thin Solid Films, 2006
The characteristics of various copper (Cu) barrier layers, including SiN, SiCN, and SiCO, were investigated in this work. Carbon-based barrier films (SiCN and SiCO) improved the dielectric constant and line-to-line capacitance, but led to sacrifice in film deposition rate, diffusion-barrier performance, and adhesion strength to Cu in comparison with SiN films. In addition, SiN and SiCO films showed the superior electromigration (EM) performance and stress-induced void migration (SM) performance, respectively. Furthermore, the reliability results of SM and EM are strongly related to the barrier film stress characteristics and the adhesion strength between Cu layers. Therefore, optimization of the barrier layer stress and the enhancement of the interfacial condition between Cu and barrier films are crucial to significantly improve reliability.
Microelectronics Reliability, 2008
A fully passivated Metal-Oxide-Semiconductor (MOS) capacitor [T} okei Zs. Barrier integrity and reliability in copper low-k interconnects. ISTC 2005; 386-95] is used to study the intrinsic properties of a barrier between copper and dielectric in Back-End-Of-Line interconnects. Several barriers are studied and compared to each other. The test vehicle is also used to thoroughly investigate the role of thermal diffusion or field assisted ionic copper drift during Time-Dependent-Dielectric Breakdown (TDDB) by investigating the breakdown of dielectrics without a barrier at very low voltages. Comparing different barriers revealed that a ''standard" PVD-based Ta barrier has a significantly better TDDB-performance compared to an 8 nm SiCN-barrier. For samples without barrier, it was found that long thermal anneals without the application of a stress voltage changes the distribution of failure times. Furthermore, the possibility of a bimodal distribution was argued when stressing these devices at a wide range of fields. A corollary is that, in presence of copper, both the E-model and the root-E-model do not apply for describing the experimental data obtained on these samples without barrier.
The Analysis of Dielectric Breakdown in Cu/Low-k Interconnect System
2006 European Solid-State Device Research Conference, 2006
Novel test structures were designed for TEM analysis to examine the origin of dielectric breakdown in Cu/low-k interconnect systems, and it was found to be associated with interfacial delamination. Using an electrostatic discharge zapping technique enables the dielectric breakdown monitoring progressively from the interfacial delamination between a SiC capping layer and a SiOC inter-dielectric layer to the catastrophic thermal breakdown of Cu/low-k interconnect system. The intermetal dielectric leakage current increased as the delamination becomes wider in terms of the number of electrostatic zaps.
Applied Physics Letters, 2011
Time dependent dielectric breakdown ͑TDDB͒ lifetime model study has been performed on a metal-insulator-semiconductor capacitor structure with copper directly deposited on silicon dioxide without a barrier material. The structure generates a low electric field acceleration of time-to-failure, which makes it possible to measure TDDB over a wide range of electric fields from 3.5 to 10 MV/cm and experimentally validate TDDB lifetime model without any assumption and data extrapolation. The experimental results are in good agreement with the so called 1 / E model and do not support the E, ͱE, or power-law model.
In situ study on low-k interconnect time-dependent-dielectric-breakdown mechanisms
Journal of Applied Physics, 2014
An in situ transmission-electron-microscopy methodology is developed to observe time-dependent dielectric breakdown (TDDB) in an advanced Cu/ultra-low-k interconnect stack. A test structure, namely a "tip-to-tip" structure, was designed to localize the TDDB degradation in small dielectrics regions. A constant voltage is applied at 25 C to the "tip-to-tip" structure, while structural changes are observed at nanoscale. Cu nanoparticle formation, agglomeration, and migration processes are observed after dielectric breakdown. The Cu nanoparticles are positively charged, since they move in opposite direction to the electron flow. Measurements of ionic current, using the Triangular-Voltage-Stress method, suggest that Cu migration is not possible before dielectric breakdown, unless the Cu/ultra-low-k interconnect stacks are heated to 200 C and above. V C 2014 AIP Publishing LLC.
The effect of Cu diffusion on the TDDB behavior in a low-k interlevel dielectrics
Microelectronics Reliability, 2006
The effect of Copper on TDDB failure in a structure incorporating a low-k interlevel dielectric was studied theoretically and experimentally. Interdigitated comb capacitor structures were prepared with and without Cu metallization and stressed at 4.0 to 6.6 MV/cm at 150C. The samples without Cu did not fail to over 1800 hours at 4 MV/cm whereas the samples with Cu exhibited a median time to failure (t 50 ) of ~45 minutes. At 6.6 MV/cm, the t 50 was ~1.8 hours for the Cu free samples. This experiment demonstrated the importance of Cu in the TDDB behaviour of low-k dielectrics, but also demonstrated that the presence of Cu was not a necessary condition for failure. The effect of Cu diffusion on TDDB behaviour was studied in the context of the "Impact Damage" model. Both field assisted ionic diffusion and diffusion of neutral Cu was considered. It is seen that the behaviour at low fields near use conditions may have little relationship to the predictions obtained from the results of typical TDDB testing.
Reliability studies of barrier layers for Cu/PAE low-k interconnects
Microelectronics Reliability, 2006
Electromigration and electrical breakdown are two of the most important concerns in the reliability of modern electronic devices. The electromigration lifetimes and electrical breakdown field (E BD) in single damascene copper lines/ porous polyarylene ether (PAE) dielectric with different diffusion barrier materials (i.e., amorphous-SiC:H and TaN/ Ta) were studied. The results showed a ''wafer edge effect'' in both groups of samples. The electromigration lifetime of samples taken from the center of the wafer is five to nine times longer of those taken from the wafer edge in the accelerated test. The samples from wafer edge showed a bi-modal failure characteristic. It was also found that electromigration resistance of the structure with new diffusion barrier a-SiC:H/Ta was comparable to that with the conventional TaN/Ta. On the other hand, the electrical testing showed that E BD of the a-SiC:H/Ta structure is about twice of that with TaN/Ta barrier, indicating a significant improvement of the electrical performance.