2.4–10 GHz Low-Noise Injection-Locked Ring Voltage Controlled Oscillator in 90 nm Complementary Metal Oxide Semiconductor (original) (raw)
Related papers
2010
A low-phase-noise ring voltage-controlled oscillator (VCO) with subharmonic injection locking is presented. The ring VCO topology is designed to obtain not only an acceptable spurious level but also satisfactory phase-noise characteristics by enabling the use of short-pulse-width injection signals (83.3 ps). We also present the measurement results in the case of nonintegral subharmonic locking such as quarter-integral subharmonic locking and half-integral subharmonic locking. The proposed VCO has a wide frequency tuning range, namely, 0.62-1.5 GHz. This range is realized by combining pMOS resistive loads and a circuit for shifting the bias level. Thus, rail-to-rail voltages can be used for control. The 1-MHz-offset phase noise of the VCO is −126 dBc/Hz at an output frequency of 1.35 GHz (= 13.5×100 MHz) and a spurious level of −48 dBc. At a spurious level of-40 dBc, the phase noise of the VCO at the same frequency (= 6.75×200 MHz) is-126 dBc/Hz. At a VCO output frequency of 1.35 GHz, the power consumption from a 1.8 V power supply is 41 mW. The VCO was fabricated by 0.18 µm CMOS technology and occupies an area of 0.014 mm 2 .
2017 Japan-Africa Conference on Electronics, Communications and Computers (JAC-ECC), 2017
This paper presents the design of low phase noise, high figure of merit (FoM), and low power injection locked ring oscillator (ILRO) in 0.18 μm CMOS technology. Edge injection technique has been adopted for ring oscillator (RO) phase noise suppression and performance enhancement. Edge injection helps improving the oscillator jitter performance while maintaining spurious harmonics minimized. In addition, implementing the proposed RO using identical NAND delay stages simplifies the design and improves frequency oscillation adjustment. The proposed injection locked oscillator (ILO) has an oscillation frequency of 3.3 GHz with fine tuning range of 400 MHz. This ILO achieves a phase noise of −120.2 dBc/Hz at 1 MHz offset. It consumes only 4.4 mW from a 1.8 V DC power source. The proposed ILRO can achieve a FoM of −184.1 dBc/Hz.
2014
Implementation of a CMOS differential ringVCO that locks at half-integral(1.5, 2.5,3.5,· · .) as well as integral (1, 2, 3, · · .) multiples of the injected reference frequency fref are presented here. Half-integral subharmonic locking main advantage is that, the output phase noise can be lowered for a given output frequency step when using integral subharmonic locking mechanism because of the higher (2x) reference frequency. Here a output phase noise of -133.3dBc/Hz was obtained at 1MHz offset frequency .At a VCO output frequency of 6.3 GHz when locked to an integral subharmonic of fref = 528.33 MHz, at delay of 37.8ps. The ring VCO consumes very less amount of power i.e. 8.7mW at a supply voltage of 1v also a wide range of frequency tuning range is obtained i.e. from 1.22GHz – 6.55GHz. The ring-VCO was fabricated with a 90nm CMOS process.
A Low Phase Noise CMOS Ring Oscillator Using Phase Modulation and Pulse Injection Techniques
This paper presents a novel design of a ring oscillator (RO) producing eight phases output with accurate signal phase adjustment. By using the pulse injection technique, the RO phase noise has been strongly suppressed. In addition, a novel phase control technique is proposed for the implementation of the phase modulation. The proposed RO achieves a phase noise of-131.5 dBc/Hz @1MHz offset and FoM of-199.25 dBc/Hz. This RO consumes a 3.4 mW of power from a 1.8V power supply while having an oscillation frequency of 4.5 GHz and a locking range of 540 MHz in CMOS 0.18 um technology.
An eight-phase CMOS injection locked ring oscillator with low phase noise
2014 IEEE International Conference on Ultra-WideBand (ICUWB), 2014
This paper presents the design of a low DC power, low phase noise single-ended ring oscillator (RO) in 0.18 µm CMOS technology. It introduces a new RO output phase control technique. This RO uses a voltage pull-down circuit to produce different output signal phases. The proposed RO employs the pulse injection (PI) technique for phase noise and spurious signals suppression. The proposed injection locked ring oscillator (ILRO) can be used for phase shift keying (PSK) implementation. The proposed ILRO has an oscillation frequency of 4.5 GHz with a fine tuning range of 540 MHz. It consumes only a 4.25 mW of power while having a phase noise of -130.9 dBc/Hz @ 1MHz offset. Through this ILRO design, a figure of merit (FoM) of -197.68 dBc/Hz has been achieved. Index Terms-CMOS, phase noise, ring oscillator (RO), voltage pull-down, pulse injection (PI), spurious signals, injection locked ring oscillator (ILRO).
A Low Phase Noise CMOS Ring Oscillator Using Phase Modulation and Pulse Injection Techniques (マイクロ波)
This paper presents a novel design of a ring oscillator (RO) producing eight phases output with accurate signal phase adjustment. By using the pulse injection technique, the RO phase noise has been strongly suppressed. In addition, a novel phase control technique is proposed for the implementation of the phase modulation. The proposed RO achieves a phase noise of -131.5 dBc/Hz @1MHz offset and FoM of -199.25 dBc/Hz. This RO consumes a 3.4 mW of power from a 1.8V power supply while having an oscillation frequency of 4.5 GHz and a locking range of 540 MHz in CMOS 0.18 um technology.
IEEE Transactions on Circuits and Systems II: Express Briefs, 2012
A modified coupled method for multiphase oscillator is proposed and demonstrated in a standard 0.18-μm CMOS technology. A self-injection-coupled (SIC) technique is used to couple two current-reused differential voltage-controlled oscillators (VCOs). Compared with the conventional parallel-coupled quadrature VCO (QVCO), the proposed QVCO using the SIC technique presents low phase noise without increasing dc power consumption. The proposed SIC-QVCO at 16.28 GHz demonstrated a low phase noise of −125 dBc/Hz at 1-MHz offset frequency and a tuning range of 290 MHz. The dc supply voltage and current consumption are 1.8 V and 6 mA, respectively. The chip size of the proposed SIC-QVCO is 0.75 × 0.6 mm 2 .
Electronics
This paper presents an injection locked digitally controlled ring oscillator (IL-DCRO). To reduce jitter variations, minimize oscillator spurious signals, and eliminate periodical phase error, a double edge-injection (window injection) scheme with synchronized edge directions is proposed. A combinational edge generator is utilized to substitute the sequential edge generators for injection timing requirements relaxation. By biasing devices in deep triode, digitally controlled delay cells currents are adopted for frequency tuning. This helps reducing the devices flicker (1/f) noise and minimize the DCRO overall phase noise. At 1 MHz offset of frequency, the proposed oscillator has a measured phase noise of −125.95 dBc/Hz and −115.6 dBc/Hz at oscillation frequencies of 913.4 MHz and 432.6 MHz, respectively. Fabricated in 350 nm CMOS process, with a maximum power consumption of 3.3 mW, and oscillating at 913.4 MHz, this DCRO achieves a tuned oscillator figure of merit (FoM) of −197.35 d...
A low phase noise 10 GHz VCO in 0.18/spl mu/m CMOS process
2005 European Microwave Conference, 2005
A fully integrated 10 GHz LC voltage controlled oscillator is presented. The VCO is implemented in 6 metal 0.18 m CMOS process. The VCO achieves a wide tuning range of 20.1% (10.20 GHz to 12.48 GHz), and provides an output power of -3 dBm, while drawing 22.7mA from 2.2V power supply. The measured phase noise is -125.33 dBc/Hz at 1 MHz offset from the carrier at 10.3GHz. The VCO figure of merit is a record low -188 dBc/Hz.
Low phase noise CMOS voltage-controlled oscillators
2007
Design considerations and performance comparisons for several low phase noise CMOS voltagecontrolled oscillator (VCO) topologies are presented including the Hartley, quadrature Colpitts, Clapp, and tuned-input tunedoutput configurations. An indirect approach for high-frequency signal generation using a VCO coupled with a 2X passive frequency multiplier is also described. Several of the structures are attractive alternatives to the conventional LC tank VCO.