Design of novel cascaded multilevel inverter by series of sub multilevel inverters (original) (raw)
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An improved topology of cascaded multilevel inverter with low switch count
International Journal of Power Electronics, 2020
An improved topology of the multilevel inverter is described in this paper. Proposed topology is comprised of the basic module to get positive levels at the output. An H-bridge can be formed to obtain ac output. Developed topology significantly reduces the number of IGBTs, DC voltage sources, gate drivers for the same number of levels. Different algorithms are presented to determine the number of levels, switches, total blocking voltage and total standing voltage. Comparison of the proposed topology with the conventional cascaded multilevel inverters and other existing topologies in the literature has been carried out to show the advantages of the newly proposed topology. The operation and performance of the proposed multilevel inverter are verified by suitable experimental results with a single phase 15-level multilevel inverter considering resistive and inductive loads.
A NEW CASCADED MULTILEVEL INVERTER WITH LESS NO OF SWITCHES
In this paper proposed a new topology for cascaded multi level inverters. This structure consists of series connection of proposed basic unit blocks which are built with both unidirectional and bidirectional switches. The proposed structure has some advantages including: reduction in the number of switches and driver circuits, cost and installation area. Three algorithms for determination of dc voltages sources' magnitudes have also been proposed. The algorithms can produce all odd and even levels at the output voltage the proposed structure also has fewer dc voltage sources variety and less maximum blocking voltage of switches compared to conventional inverters. The capability of proposed structure This paper propose a new topology for cascaded multilevel in producing all odd and even output voltage levels is proved by simulation result for a 21-level inverter.
A Generalized Cascaded Multilevel Inverter Using Series Connection of Submultilevel Inverters
IEEE TRANSACTIONS ON POWER …, 2013
Application of multilevel inverters for higher power purposes in industries has become more popular. This is partly because of high-quality output waveform of multilevel inverters in comparison with two-level inverters. In this paper, initially a new topology for submultilevel inverter is proposed and then series connection of the submultilevel inverters is proposed as a generalized multilevel inverter. The proposed multilevel inverter uses reduced number of switching devices. Special attention has been paid to obtain optimal structures regarding different criteria such as number of switches, standing voltage on the switches, number of dc voltage sources, etc. The proposed multilevel inverter has been analyzed in both symmetric and asymmetric conditions. The validity of the proposed multilevel inverter is verified with both computer simulations using PSCAD/EMTDC software and laboratory prototype implementation.
IEEE Transactions on Industrial Electronics, 2014
In this paper, a new general cascaded multilevel inverter using developed H-bridges is proposed. The proposed topology requires a lesser number of dc voltage sources and power switches and consists of lower blocking voltage on switches, which results in decreased complexity and total cost of the inverter. These abilities obtained within comparing the proposed topology with the conventional topologies from aforementioned points of view. Moreover, a new algorithm to determine the magnitude of dc voltage sources is proposed. The performance and functional accuracy of the proposed topology using the new algorithm in generating all voltage levels for a 31-level inverter are confirmed by simulation and experimental results. Index Terms-Cascaded multilevel inverter, developed H-bridge, multilevel inverter, voltage source inverter.
2017
Multilevel inverters , covering a wide power range are currently considered as a better industrial solution for high dynamic performance and power-quality demanding applications. In this converter ,for specific time intervals fewer switches will be conducting so switching loss is also reduced . To generate gating signal Phase Disposition Pulse Width Modulation (PDPWM) technique is used here. This paper represents overall THD for different levels and different carrier frequencies. In this paper switching loss,conduction loss of inverter have been discussed and hence inverter efficiency can be calculated. Simulation studies are presented by using MATLAB/SIMULINK.
A Comparative Study between Different Types of Multilevel Inverter
IRJET, 2022
This paper compares between four different topologies of cascaded H-bridge multilevel inverter. Inverter can be defined as a power electronic device which can convert dc to ac at specified output voltage and frequency. Multilevel inverters are the preferred choice of industry for application in high voltage and high power. The basic advantage of a multilevel inverter is that it can give high power at the output while working under medium voltage source. It does so with the help of multiple dc sources at the input. The main merits of the paper are Comparative Study of Different Types of Multilevel Inverter and also study on minimizing the total harmonic distortion which will help the designer to design an appropriate multilevel inverter.
A New Cascaded Multilevel Inverter Structure with Less Number of Switches
Because of many features of multilevel inverters, its applications in industries are not negligible. This paper proposes a new topology for multilevel inverters that has been obtained from series blocks of sub multilevel inverter. One of the issues in this kind of inverters is quantity of switches. The proposed inverter consists of fewer number of power electronic switches which leads to lower switching loss, weight, and cost in comparison with conventional inverters. Another advantage of this structure is its modular capability. In this paper, three algorithms are considered to determine the size of DC voltage source and eventually accuracy of proposed inverter has been approved by PSCAD/EMTDC software.
Cascaded Multilevel Inverter Topology Based on Cascaded H-Bridge Multilevel Inverter
Energies
A three-phase multilevel inverter topology for use in various applications is proposed. The present topology introduces a combination of a cascaded H-bridge multilevel inverter with a cascaded three-phase voltage source inverter (three-phase triple voltage source inverter (TVSI)). This combination will increase the number of voltage levels generated when using fewer components compared with the conventional multilevel inverter topologies for the same voltage levels generated. The other advantage gained from the proposed configuration is the assurance of a continuous power supply to the grid in case of failure in one part of the proposed configuration. In addition, the voltage stresses on switches are reduced by half compared if each part in the proposed topology is working independently. The comparison of the proposed topology with some conventional multilevel inverter topologies is presented. The proposed topology is built in the SIMULINK environment and is simulated under various loads in addition to being connected to the grid. Phase-shifted pulse width modulation technique is used to generate the required switching pulses to drive the switches of the proposed topology. The inverter is experimentally implemented in the lab, and the switching pulses are generated with the help of MicroLabBox produced by dSPACE (digital signal processing and control engineering) company. The simulation and experimental results and their comparisons are presented to verify the proposed topology's effectiveness and reliability.
review study of multilevel inverter
This paper Presents design and simulation of a cascade H bridge multilevel inverter using sinusoidal pulse width modulation technique. The purpose of multilevel inverter is to generate stair case sinusoidal pulse using different DC Supply. In this paper we generate carrier based SPWM scheme using PD,POD,APOD compare it for five level and seven level by doing FFT analysis in order to find optimized output voltage quality. The MATLAB, Simulink result shows that seven level inverter voltages has less total harmonic distortion in comparison with five level inverter.
Journal of Operation and Automation in Power Engineering, 2014
In this paper, a new cascaded multilevel inverter by capability of increasing the number of output voltage levels with reduced number of power switches is proposed. The proposed topology consists of series connection of a number of proposed basic multilevel units. In order to generate all voltage levels at the output, five different algorithms are proposed to determine the magnitude of DC voltage sources. Reduction of the used power switches and the variety of DC voltage sources magnitudes are two main advantages of the proposed topology. These results are obtained by comparison of the proposed inverter with the H-bridge cascaded multilevel inverter and one of recently presented topologies. The remarkable ability of the proposed topology with its algorithms in generating all voltage levels (even and odd) is verified through PSCAD/EMTDC simulation and experimental results of a 17-level inverter.