Quadrature Mismatch Shaping Techniques for Fully Differential Circuits (original) (raw)

Quadrature Mismatch Shaping for Digital-to-Analog Converters

IEEE Transactions on Circuits and Systems I: Regular Papers, 2000

Quadrature sigma-delta analog-to-digital converters require a feedback path for both the I and the Q parts of the complex feedback signal. If two separate multibit feedback digital-toanalog converters (DACs) are used, mismatch among the unit DAC elements leads to additional mismatch noise in the output spectrum as well as an I/Q imbalance. This paper proposes new quadrature bandpass (QBP) mismatch shaping techniques. In our approach, the I and Q DACs are merged into one complex DAC, which leads to near-perfect I/Q balance. To select the unit DAC elements of the complex multibit DAC, the well-known butterfly shuffler and tree structure are generalized towards a complex structure, and necessary constraints for their correct functioning are derived. Next, a very efficient first-order QBP shaper implementation is proposed. Finally, the newly presented complex structures are simulated to prove their effectiveness and are compared with each other with respect to performance.

Quadrature mismatch shaping with a complex, tree structured DAC

2006 IEEE International Symposium on Circuits and Systems, 2006

Quadrature Σ∆ ADCs require a feedback path for both the I and the Q part of the complex feedback signal. If two separated multibit feedback DACs are used, mismatch among the unit DAC elements leads to additional mismatch noise in the output spectrum as well as an unbalance between the I and Q DAC. This paper proposes a new quadrature bandpass mismatch shaping technique. In our approach the I and Q DACs are merged into one complex DAC, which leads to near-perfect I/Q balance. To select the unit DAC elements of the complex, multibit DAC, the well-known tree structured element selection logic is generalized toward a complex structure and necessary conditions for its correct operation are derived. Finally, a very efficient first-order quadrature shaper implementation is proposed and simulations show the effectiveness of the quadrature bandpass mismatch shaping technique.

Quadrature Mismatch Shaping with a Complex, Data Directed Swapper

2006 13th IEEE International Conference on Electronics, Circuits and Systems, 2006

Quadrature bandpass (QBP) Σ∆ ADCs require a feedback path for both the I and the Q part of the complex feedback signal. A complex DAC could give this feedback with near-perfect I/Q balance. Still, the mismatch between the unit elements of the complex DAC introduces mismatch noise that should be shaped out of the signal band with dynamic elementmatching (DEM) techniques. To select the unit DAC elements of the complex multibit DAC, the well-known data directed swapper is generalized towards a complex structure and the necessary constraints for its correct functioning are derived. Additionally, a hardware efficient structure is presented: the reduced butterfly shuffler. Here, some of the QBP swapper cells are replaced by bandpass (BP) swapper cells. Also, great attention is paid to the interconnection pattern of the data directed swapper to prevent instability.

Reducing multibit DAC circuits errors by a simplified dynamic element matching algorithm used in delta-sigma converters

Resolution of a multibit delta-sigma modulator (DSM) is limited by its internal digital-to-analog converter (DAC) nonlinearity that is usually caused by circuit mismatch errors while realizing. Recently, some dynamic element matching (DEM) methods were proposed for reducing mismatch errors. Two main difficulties of different dynamic element matching (DEM) techniques relate to instability and complexity of their algorithms. This paper provides a general method to simplify and to improve stability of high order dynamic element matching algorithms. It is shown that the proposed modifications can reduce necessary hardware for any order of sorting DEM algorithms and improve stability of the high order tree-structured DEM, without scarifying a considerable part of their ideal mismatchshaping function. Simulations are presented for different 6 th and 4 th -order bandpass mismatch-shaping circuit, moved inside the feedback loop of a 6 th -order bandpass delta-sigma modulator. However, it can also be used in lowpass DSM.

Quadrature ΣΔ modulators with a dynamic element matching scheme

IEEE Transactions on Circuits and Systems Ii-express Briefs, 2005

This brief presents a new topology of a multibit quadrature band-pass sigma-delta modulator which employs a simple dynamic element matching (DEM) technique in order to reduce the effects of path mismatch, namely aliasing in the signal band of the mirror images of the signal and of the quantization noise. The DEM scheme results in a reduction of the aliasing of the quantization noise mirror image while it reduces the input signal mirror image alias problem to a self-image problem. It is shown that the self-image can be completely removed in switched-capacitor (SC) implementations by using the same capacitors to sample the input and the reference of the feedback DACs. Moreover, a simple method for extending low-pass mismatch noise shaping techniques to the complex band-pass case is proposed for the case of multibit feedback DACs.

A third-order Δ-Σ modulator using second-order noise-shaping dynamic element matching

IEEE Journal of Solid-State Circuits, 1998

A multibit 1-6 modulator is an attractive way of realizing a high-accuracy, high-speed, and low-power data converter. However, the overall resolution of the modulator is determined by the internal digital-to-analog conversion (DAC) linearity. Methods for high-order noise shaping, noise-shaping dynamic element matching (NSDEM), have been proposed in order to overcome this drawback. However, a real implementation has not been realized until now. This paper presents the actual circuit configuration of a tree-structured NSDEM (TNSDEM) technique, which is applied to a multibit 1-6 DAC and analogto-digital converter (ADC) using a nine-level internal DAC. This is the first report of a 1-6 ADC and DAC using the secondorder NSDEM method. The test chip of the third-order 1-6 ADC realizes a signal bandwidth of 100 kHz and a dynamic range of 79 dB in the ADC and 80 dB in the DAC. The test chip only consumes 9.6 mW in the ADC and 5.2 mW in the DAC with a 2.7-V power supply.

Implementation of a 4-Bit Direct Charge Transfer Switched Capacitor DAC and DWA DEM technique

The direct charge transfer switched capacitor DAC is one of the type of delta-sigma DAC which reduce capacitor mismatch effect. The switched capacitor DAC mainly suffers from mismatch among capacitors. Mismatches among the capacitor in DAC cause the nonlinearity between output and input. It also reduces Signal to Noise Distortion Ratio (SNDR). Dynamic Element Matching (DEM) technique is used to match the capacitors. According to element selection logic there are many types. In this paper Data Weighted Averaging (DWA) technique is used for mismatch shaping. In this paper the 4 bit DCT-SC-DAC and DWA-DEM technique is implemented using WINSPICE simulation software.

A strategy for implementing dynamic element matching in current-steering DACs

2000

Interesting comparisons of dynamic element matching (DEM) techniques, have been presented during the last decade. However, not many chip implementations of these DEM techniques have been presented so far. A brief review of different DEM techniques are presented in this paper together with a strategy for implementing the partial randomization DEM, PRDEM, technique in a 3.3 V supply, 14 bit CMOS current-steering wideband digital-to-analog converter (DAC)

A 28-nm CMOS 1 V 3.5 GS/s 6-bit DAC With Signal-Independent Delta-I Noise DfT Scheme

IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2000

2015). A 28-nm CMOS 1 V 3.5 GS/s 6-bit DAC with signal-independent delta-I noise DfT scheme. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 23(1), 44-53. https://doi.Abstract-This paper presents a 3.5 GS/s 6-bit current-steering digital-to-analog converter (DAC) with auxiliary circuitry to assist testing in a 1 V digital 28-nm CMOS process. The DAC uses only thin-oxide transistors and occupies 0.035 mm 2 , making it suitable to embedding in VLSI systems, e.g., field-programmable gate array (FPGA). To cope with the IC process variability, a unit element approach is generally employed. The three most significant bit (MSBs) are implemented as seven unary D/A cells and the three least significant bits (LSBs) as three binary D/A cells, using appropriately reduced number of unit elements. Furthermore, all digital gates only make use of two basic unit blocks: a buffer and a multiplexer. For testing, a memory block of 5 kb is placed on-chip, which is externally loaded in a serial way but internally read in an 8× time-interleaved way. The memory is organized around 48 clocked 104-bit shift-registers. It keeps the resulting switching disturbances signal-independent and hence avoids inducing output nonlinearity errors, even when a common power supply is shared with the DAC. This novelty allows reliable testing of the DAC core, while avoiding performance limitation risks of handling high-speed off-chip data streams. The DAC Spurious Free Dyanmic Range >40 dB bandwidth is 0.8 GHz, while the IM3 <−40 dB bandwidth exceeds 1.3 GHz. The DAC consumes 53 mW of power and the design-for-test scheme -80 mW.

Tunable mismatch shaping for quadrature bandpass delta-sigma data converters

2010

Quadrature bandpass delta-sigma data converters are widely used in low-IF receiver applications where high linearity is required over a narrow bandwidth. A quadrature delta-sigma modulator with multibit quantization requires a digital-to-analog converter (DAC) for each of the in-phase (I) and quadrature (Q) paths. Device mismatch errors in the DAC can seriously degrade overall converter performance by adding I/Q path-mismatch and distortion. Mismatch noise shaping is an established technique for overcoming these limitations in a complex DAC, but usually anchors the signal band to a fixed frequency location. In order to apply mismatch shaping to applications that require tunable signal band locations, this paper presents a technique that allows the center frequency of the mismatch noise shaping transfer function through the complex DAC to be adjustable over the entire Nyquist range.