Design of ALU Using Reversible Logic Gates (original) (raw)

Introduction to Reversible Logic Gates & its Application

In current scenario, the reversible logic design attracting more interest due to its low power consumption. Reversible logic is very important in low-power circuit design. The important reversible gates used for reversible logic synthesis are Feynman Gate, Fredkin gate, toffoli gate, New Gate sayem gate and peres gate etc. This paper present a basic reversible gate to build more complicated circuits which can be implemented in ALU, some sequential circuits as well as in some combinational circuits. It also gives brief idea to build adder circuits using the basic reversible gate like peres gate and TSG gate.

Design and Synthesis of Reversible Arithmetic and Logic Unit (ALU)

IEEE International Conference on Computer, Communications, and Control Technology (I4CT), 2014

In low power circuit design, reversible computing has become one of the most efficient and prominent techniques in recent years. In this paper, reversible Arithmetic and Logic Unit (ALU) is designed to show its major implications on the Central Processing Unit (CPU).In this paper, two types of reversible ALU designs are proposed and verified using Altera Quartus II software. In the proposed designs, eight arithmetic and four logical operations are performed. In the proposed design 1, Peres Full Adder Gate (PFAG) is used in reversible ALU design and HNG gate is used as an adder logic circuit in the proposed ALU design 2. Both proposed designs are analysed and compared in terms of number of gates count, garbage output, quantum cost and propagation delay. The simulation results show that the proposed reversible ALU design 2 outperforms the proposed reversible ALU design 1 and conventional ALU design.

Implementation and Analysis of Reversible logic Based Arithmetic Logic Unit

TELKOMNIKA (Telecommunication Computing Electronics and Control), 2016

There is a tremendous growth in fabrication from small scale integration (SSI) to giant scale integration (GSI). It however raises a question of sustainability of Moore's law due to almost intolerable levels of power consumption. Researchers have invented a lot of methods to reduce power consumption and recent technologies are switching to reversible logic. Reversible logic has various applications in fields of computer graphics, optical information processing, quantum computing, DNA computing, ultra low power CMOS design and communication. ALU is considered to be the basic building block of a CPU in the computing environment and portability in computing system highly demands reversible logic based ALU. Modern processors usually have a word length of 32 or 64 bits. Divide and conquer approach principle cascades n number of 1 bit ALU to implement n bit ALU. Several researchers have proposed 1-bit ALU design using various reversible logic gates. This paper aims at categorizing various ways of implementation in VHDL using Xilinx ISE design suit 14.2 tool and comparative analysis of existing 1 bit ALU designs in terms of optimization metrics like power consumption, number of gates, number of constant inputs, number of garbage outputs and quantum cost .ALU realized using carry save adder block is found to be most optimum design in terms of gate count and quantum cost.

Full Adder using Reversible Logic

International Journal for Research in Applied Science and Engineering Technology IJRASET, 2020

Reversible logic gates are very popular among upcoming future computing technologies. In the field of quantum computing ,low power VLSI devise, nanotechnology, DNA computing optical computing , quantum-dot cellular automata reversible logic circuits have various applications which are helping the world to do their work more easily [3]. Despite them, Quantum computers are the another major application of reversible logic ,these are certain areas in which the quantum devices are essential, with less power dissipation and at ultra high speed these devices can be ideally operated, these devices must build from reversible logic components, such requirements and versatility of reversible logic makes the reversible logic as one of the most versatile area for the researchers to discover new devises based on it and bring a revolutionary change in the field of computing technologies and various other fields in which reversible logic is a better option to be used in the past few decades .In past few decades reversible logic has became the major source of designing the modern circuits which can be helpful in various devices. Along with space and power, the delay is one of the significant issues in VLSI design. Reversible logic is becoming a huge source of research day by day, having the area for research in the designing of the complementary metal oxide semiconductor field effect transistor with the small amount of power consumption. The design proposed in the paper of full Adder circuit is one of the example of such circuit which is implemented by using reversible logic gates and hence the design proposed in this paper operated as reversible full adder. With much lesser complexity in the terms of hardware and lesser efficiency in terms of undesired outputs , gate count and same input the proposed design is most reliable than the presented ones. The reversible logic gates provided us a drastic change in the operation of electronic devices by using of fast switching operation of the gate used in the designing of reversible logic structure. Finally we can say that from the above illustration the reliability of the proposed design is increased. Keyword: Reversible, Fredkin gate, full adder, delay. I. INTRODUCTION In the present era the reversible logic design is gaining more attention due to its zero energy dissipation as no energy is being lost and low power consumption as the power consumed by it is less. Under the ideal condition the power dissipation of reversible logic is zero [1]. The relation between input and output reversible circuits have a monotonic mapping , thus, the vector of the input stage can always reconstruct from the output stage vectors. Rolf Landauer, in 1961, stated that whenever we use a logically irreversible gate, we dissipate energy in the surrounding INFORMATION LOSS=ENERGY LOSS That is the loss of one bit of information dissipate KTln2 of energy in irreversible gate due to which the heat energy dissipated, which degrade the output and result in the drop of the duration of the component. therefore due to this loss of information certain adverse effect on components may occur. Whereas in the reversible gate, no information is lost, hence there is no adverse effect on components, which leads to improvement in energy efficiency improvements and performance. which results into a improved version of circuits. The scientist Bennett has shown in 1970's that if the network permit the regeneration of the input by help of output then energy will not liberated from the system will not equal to KTln2[1]. The reversible logic consist of both frontend and backend. In Reversible logic the system follows the process of running both forward and backward. Therefore by computing backward we easily recover the earlier stage. Reversible logic is the most convenient and efficient way of designing the circuits. Some important logic gates in reversible logic gate Feynman gate, double Feynman gate, Friedkin gate, Toffoli gate, Peres gate, etc. Reversible compute have certain uses in the field of computer security and low power CMOS, quantum Computer nanotechnology and many more [4]. It has a vast field of application. Reversible logic can be applied in the implementation of various technologies it is helpful in designing different kinds of circuit for different applications. These logic gates having the capability to store the information in them without any loss of data during the system processing. These gates also maintain the system integrity and makes the data confidential.

Design of a Reversible ALU Based on Novel Reversible Logic Structures

Programmable reversible logic is emerging as a prospective logic design style for implementation in modern nanotechnology and quantum computing with minimal impact on circuit heat generation. Recent advances in reversible logic using and quantum computer algorithms allow for improved computer architecture and arithmetic logic unit designs. In this paper, a 2*2 Swap gate which is a reduced implementation in terms of quantum cost and delay to the previous Swap gate is presented. Next, a novel 3*3 programmable UPG gate capable of calculating the fundamental logic calculations is presented and verified, and its advantages over the Toffoli and Peres gates are discussed. The UPG is then implemented in a reduced design for calculating n-bit AND, n-bit OR and n-bit ZERO calculations. Then, two 3*3 RMUX gates capable of multiplexing two input values with reduced quantum cost and delay compared to the previously existing Fredkin gate is presented and verified. Next, 4*4 reversible gate is pre...

A LOW POWER ADDER USING REVERSIBLE LOGIC GATES

IJRET, 2012

Reversible logic has emerged as one of the most important approaches for the power optimization with its application in low power VLSI design. They are also the fundamental requirement for the emerging field of the Quantum computing having with applications in the domains like Nano-technology, Digital signal processing, Cryptography, Communications. Implementing the reversible logic has the advantages of reducing gate counts, garbage outputs as well as constant inputs. In contrast to conventional gates, reversible logic gates have the same number of inputs and outputs, each of their output function is equal to 1 for exactly half its input assignments and their fan-out is always equal to 1. It is interesting to compare both reversible and conventional gates. In this paper addition, subtraction, operations are realized using reversible logic gates like DKG and TSG gate and compared with conventional gates

Efficient Design Of 4-Bit Binary Adder Using Reversible Logic Gates

This paper proposes the design of 4-bit adder and implementation of adder Reversible logic gate to improve the design in terms of garbage outputs and delay. In the recent years, reversible logic has emerged as a promising technology having its applications in low power CMOS, quantum computing, nanotechnology and optical computing because of it’s zero power dissipation under ideal conditions. Thus, the project will provide the reversible logic implementation of the conventional 4-bit adder using Toffoli gate, Peres gate and using both Peres gate and Fredkin gate. The proposed reversible logic implementation of the 4- bit adder is optimized to obtain minimum number of logic gates and garbage outputs. This project work on the reversible 4-bit adder circuits designed and proposed here form the basis of the decimal ALU of a primitive quantum CPU. The designed and optimized 4-bit reversible adder is implemented in VHDL Using Xilinx ISE 12.1 tool.

High functionality reversible arithmetic logic unit

International Journal of Electrical and Computer Engineering (IJECE), 2020

Energy loss is a big challenge in digital logic design primarily due to impending end of Moore"s Law. Increase in power dissipation not only affects portability but also overall life span of a device. Many applications cannot afford this loss. Therefore, future computing will rely on reversible logic for implementation of power efficient and compact circuits. Arithmetic and logic unit (ALU) is a fundamental component of all processors and designing it with reversible logic is tedious. The various ALU designs using reversible logic gates exist in literature but operations performed by them are limited. The main aim of this paper is to propose a new design of reversible ALU and enhance number of operations in it. This paper critically analyzes proposed ALU with existing designs and demonstrates increase in functionality with 56% reduction in gates, 17% reduction in garbage lines, 92% reduction in ancillary lines and 53% reduction in quantum cost. The proposed ALU design is coded in Verilog HDL, synthesized and simulated using EDA (Electronic Design Automation) tool-Xilinx ISE design suit 14.2. RCViewer+ tool has been used to validate quantum cost of proposed design. 1. INTRODUCTION Digital logic design based on conventional computing is getting obsolete due to high heat loss. In conventional computing based on irreversible logic; inputs cannot be predicted from output due to bit loss and therefore randomness is generated and that leads to heat loss [1]. By incorporating reversible logic in digital logic design, this heat loss can be avoided [2]. In reversible logic gates, number of output lines are mapped same as input lines to avoid bit loss and hence inputs can be easily recovered from output. ALU is an important building block of any digital logic design and find application in computers, smart phones, and digital signal processors etc. The initial research efforts in area of reversible logic based ALU was proposed by ancillary and garbage free V-shape design [3]. This design was proposed using only 6 elementary gates to perform 5 basic arithmetic and logical operations but there is scope of improvement of its functions [3]. A novel 5x5 Morrison gate [4] was used in designing of novel reversible ALU along with HNG gate. The Proposed circuit can perform nine arithmetic and logical operations. The quantum cost of proposed circuit is 35. The proposed circuit took two constant input lines and produced six garbage output lines. The first attempt to propose high functionality in ALU design was made by Guan and his coauthors. According to authors, their proposed circuit can perform 32 operations [5] but there are some redundant operations. A significant study by Syamala and Tilak [6] demonstrated two approaches of ALU Design. The first approach is control structure based reversible one-bit ALU design and another approach is

Design of Digital Adder Using Reversible Logic

Reversible logic circuits have promising applications in Quantum computing, Low power VLSI design, Nanotechnology, optical computing, DNA computing and Quantum dot cellular automata. In spite of them another main prominent application of reversible logic is Quantum computers where the quantum devices are essential which are ideally operated at ultra high speed with less power dissipation must be built from reversible logic components. This makes the reversible logic as a one of the most promising research areas in the past few decades. In VLSI design the delay is the one of the major issue along with area and power. This paper presents the implementation of Ripple Carry Adder (RCA) circuits using reversible logic gates are discussed.

A New Reversible Design of Adder & Subtractor Using Reversible Logic Gates

2018

Modern VLSI design circuitry is used for low power consumption which is the requirements of ICs. Reversible logic has its tremendous applications and importance because it doesn’t lose any single bit of information of no information while performing computation bit loss during computation; it reflects the result in low power dissipation. However, we have to convert the reversible circuits into fault tolerant reversible circuits; it helps to detect the occurrence of errors and faults. Parity preserving property can be used for this. A new parity preserving reversible gate is proposed in this paper, named as P2RG. The most significant aspect of this work is that it can work as a full adder as well as full subtractor by using one P2RG and Fredkin gate only. This proposed design is very good in terms of gate count, garbage outputs, constant inputs and area than the existing similitude. The concept behind the reversible logic circuits is that the inputs and outputs are same.