Ultrawide Frequency Range Crosstalk Into Standard and Trap-Rich High Resistivity Silicon Substrates (original) (raw)

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Impact of crosstalk into high resistivity silicon substrate on the RF performance of SOI MOSFET Cover Page

Paper Impact of Crosstalk into High Resistivity Silicon Substrate on the RF Performance of SOI MOSFET

2016

Abstract—Crosstalk propagation through silicon substrate is a serious limiting factor on the performance of the RF devices and circuits. In this work, substrate crosstalk into high re-sistivity silicon substrate is experimentally analyzed and the impact on the RF behavior of silicon-on-insulator (SOI) MOS transistors is discussed. The injection of a 10 V peak-to-peak single tone noise signal at a frequency of 3 MHz ( fnoise) gener-ates two sideband tones of −56 dBm separated by fnoise from the RF output signal of a partially depleted SOI MOSFET at 1 GHz and 4.1 dBm. The efficiency of the introduction of a trap-rich polysilicon layer located underneath the buried oxide (BOX) of the high resistivity (HR) SOI wafer in the reduction of the sideband noise tones is demonstrated. An equivalent circuit to model and analyze the generation of these sideband noise tones is proposed.

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Paper Impact of Crosstalk into High Resistivity Silicon Substrate on the RF Performance of SOI MOSFET Cover Page

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Surface-Passivated High-Resistivity Silicon Substrates for RFICs Cover Page

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A Simple Electrical RLC Crosstalk Model for Interconnects on Silicon Cover Page

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Surface-passivated high-resistivity silicon as a true microwave substrate Cover Page

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High-Temperature Characterization of Multiple Silicon-Based Substrate for RF-IC Applications Cover Page

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Three-Dimensional Substrate Impedance Engineering Based on<tex>$hbox p ^-$</tex>/<tex>$hbox p ^+$</tex>Si Substrate for Mixed-Signal System-on-Chip (SoC) Cover Page

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A novel low-loss low-crosstalk interconnect for broad-band mixed-signal silicon MMICs Cover Page

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RF Performance of a Commercial SOI Technology Transferred Onto a Passivated HR Silicon Substrate Cover Page

This article has been accepted for inclusion in a future issue of this journal. Content is final as presented, with the exception of pagination. IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS 1 RF MEMS Passives on High-Resistivity Silicon Substrates

2015

Abstract—Diverse RF passive devices and microelectro- me-chanical systems (MEMS) can be monolithically integrated on a high-resistivity silicon (HR-Si) substrate. However, parasitic surface conduction (PSC) at the interface of HR-Si and a silicon dioxide passivation layer reduces the effective substrate resistivity, which in turn results in deterioration of the device quality factor and non-linearity. Trap-rich HR-Si has been proposed as a low substrate loss alternative, eliminating the prob-lems associated with PSC. However, the full potential of trap-rich HR-Si as a common platform for implementing MEMS passives is not fully explored. In this letter, we evaluate the effectiveness of the trap-rich layer by comparing the frequency response of a number of RF passive devices fabricated on standard and trap-rich HR-Si substrates. In addition, we suggest an electromagnetic (EM) simu-lation setup that can be used to efficiently and accurately simulate the device performance. Index Terms—...

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This article has been accepted for inclusion in a future issue of this journal. Content is final as presented, with the exception of pagination. IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS 1 RF MEMS Passives on High-Resistivity Silicon Substrates Cover Page