ON THE ROLE OF THE INSULATOR/SILICON INTERFACE IN THE DESTRUCTIVE DIELECTRIC BREAKDOWN IN OXIDE AND OXYNITRIDE FILMS (original) (raw)

Dielectric breakdown I: A review of oxide breakdown

Microelectronics Journal, 1996

This paper gives an overview of the dielectric breakdown in thin oxide layers on silicon. First test methods are discussed, followed by their application to the estimation of the oxide lifetime. The main part of the paper is devoted to the physical background of the intrinsic breakdown. Finally, defect-related or extrinsic breakdown is discussed. Copyright

Polarity dependence of dielectric breakdown in scaled SiO/sub 2/

Proceedings of 1994 IEEE International Electron Devices Meeting

We have investigated polarity dependence of dielectric breakdown under constant current stress in scaled S io2 dielectrics. Results show that high-field-induced interface state generation is reduced as oxide thickness scales down and charge-to-breakdown (QBD) for positive gate bias (+V,) increases with decreasing oxide thickness. However, QBD for negative gate bias (-Vg) shows an opposite vend to QBD(+Vg), i.e. QBD(-V~) decreases dramatically with decreasing oxide thickness. Therefore, there is an increased polarity dependence of dielectric breakdown when oxide thickness scales down. A physical model based on the degradation of structural transition layer (STL) and interface is proposed to explain the observed trends in QBD. techniques, i.e. 1050°C rapid-thermal processing (RTP) oxidation and 850°C furnace oxidation, with thicknesses ranging from 42 to 120 A. At the same time, N20-oxides with a similar thickness range were also rapid-thermally grown in pure N 2 0 ambient at 1050°C. Polysilicon was deposited and doped with POCl3, followed by lithography, reactive ion etching and forming gas anneal. QBD was measured by constant current stress. Interface trap density (Dit) was determined from high-frequency C-V (HFCV) and quasi-static C-V (QSCV) measurements. The oxide thicknesses were determined from QSCV measurements. Capacitors with the smallest gate area (5~1 0-~ cm2) were used throughout this study in order to identify only intrinsic breakdown.

Dielectric breakdown mechanisms in gate oxides

Journal of Applied Physics, 2005

In this paper we review the subject of oxide breakdown ͑BD͒, focusing our attention on the case of the gate dielectrics of interest for current Si microelectronics, i.e., Si oxides or oxynitrides of thickness ranging from some tens of nanometers down to about 1 nm. The first part of the paper is devoted to a concise description of the subject concerning the kinetics of oxide degradation under high-voltage stress and the statistics of the time to BD. It is shown that, according to the present understanding, the BD event is due to a buildup in the oxide bulk of defects produced by the stress at high voltage. Defect concentration increases up to a critical value corresponding to the onset of one percolation path joining the gate and substrate across the oxide. This triggers the BD, which is therefore believed to be an intrinsic effect, not due to preexisting, extrinsic defects or processing errors. We next focus our attention on experimental studies concerning the kinetics of the final event of BD, during which the gate leakage increases above acceptable levels. In conditions of intrinsic BD, the leakage increase is due to the growth of damage within the oxide in localized regions. Observations concerning this damage are reviewed and discussed. The measurement of the current, voltage, and power dissipated during the BD transient are also reported and discussed in comparison with the data of structural damage. We then describe the current understanding concerning the dependence of the BD current transient on the conditions of electric field and voltage. In particular, as the oxide thickness and, as a consequence, the voltage levels used for accelerated reliability tests have decreased, the BD transient exhibits a marked change in behavior. As the stress voltage is decreased below a threshold value, the BD transient becomes slower. This recently discovered phenomenon has been termed progressive BD, i.e., a gradual growth of the BD spot and of the gate leakage, with a time scale that under operation conditions can be a large fraction of the total time to BD. We review the literature on this phenomenon, describing the current understanding concerning the dependence of the effect on voltage, temperature, oxide thickness, sample geometry, and its physical structure. We also discuss the possible relation to the so-called soft oxide BD mode and propose a simpler, more consistent terminology to describe different BD regimes. The last part of the paper is dedicated to exploratory studies, still at the early stages given the very recent subject, concerning the impact on the BD of materials for the metal-oxide-semiconductor gate stack and, in particular, metal gates.

Degradation and Breakdown of Gate Oxides in VLSI Devices

Physica Status Solidi (a), 1989

Degradation and Breakdown of Gate Oxides in VLSI Devices BY J. SURE, I. PLACENCIA, N. BARNIOL, E. FARRES, and X. AYMERICH A model for the degradation and breakdown of thin gate oxide films is presented. During electrical stresses, a small fraction of the energy of the tunnel electrons that is dissipated in the oxide is converted into the creation of electron traps. When a critical density of traps is achieved, a fast runaway process leads the oxide t o break down and its insulating properties are irreversively lost. It is demonstrated that the total charge injected to breakdown depends on the applied current in accordance with recently published results. The quasi-linear log (time-to-breakdown) versus log (current density) plot experimentally obtained for VLXI oxides (tax = 100 A) is correctly predicted. Un model pour expliquer la degradation et la rupture des couches minces de SiO, en structures MOS est present& Une petite fraction de l'energie des Blectrons tunnel dissipee dans la couche d'oxyde pendant le stress Blectrique de la structure est employee en la creation de pikges d'6lectrons. Quand on arrive A une certaine densite critique de centres Blectroniques g6nBrBs, un mechanisme de runaway produit tres rapidement la rupture. Nous avons explique theoriquement la dependence experimentelle de la charge injectke jusqu'i la rupture avec le courant appliquk. La relation quasi-IinBaire entre log (temps de rupture) et log (dBnsit6 de courant) qu'on trouve experimentellement a i.t6 correctement prbdite. 1) E-08 193 Bellaterra, Spain.

Charge Build up and Breakdown in Thin Sio2 Gate Dielectrics

IEEE Transactions on Electrical Insulation, 1984

SiO2 layers with low defect densities have been grown in a double-walled oxidation tube, for use as thin gate dielectrics in MOS IC's. Under all highfield stress conditions positively charged slow states are created at the Si-SiO2 interface. These can be neutralized by applying positive fields at the gate of an MOS device. Negative charge can also be generated, especially during a positive field stress. The total amount of generated charge is much less for polysilicon gate capacitors than for Al-gate capacitors. The time-to-breakdown in a wearout experiment could be extended by periodic application of a positive gate voltage. This also caused neutralization of the slow states. However, it had no influence on the high-field breakdown distribution in a fast voltage ramp experiment. It is suggested that interface rather than bulk phenomena dominate trap generation and charge build-up during the high-field stresses which induce oxide breakdown.

Intrinsic dielectric breakdown of ultra-thin gate oxides

Microelectronic Engineering, 2001

We have investigated the dynamics of intrinsic dielectric breakdown (BD) in SiO thin films of thickness in the range 2 from 35 to 3 nm. BD is obtained under constant voltage Fowler-Nordheim stress at fields between 10 and 12.5 MV/ cm. As a function of oxide thickness we have followed with high time resolution the dynamics of the BD transient and analysed the post-BD damage by using transmission electron microscopy, photon emission microscopy and measurements of the post-BD current-voltage (I-V) characteristics. Moreover, the effect of the density of electrons at the cathode on the resulting BD damage is put in evidence. The data are interpreted and discussed in the framework of a model.

Influence of localized latent defects on electrical breakdown of thin insulators

IEEE Transactions on Electron Devices, 1991

Electrical breakdown in thin Si02 films is measured with different techniques at different electric fields. It is shown that oxide reliability is affected by the presence of latent defects requiring a certain time to develop and evolve towards a destructive stage. As such a time is weakly dependent on applied fields, breakdown is not adequately detected by accelerated tests. It is also shown that, due to the localized nature of breakdown, meaningful relationships between measured parameters able to clarify the microscopic nature of oxide failure are not easy to establish.