Hexagonal ΣΔ modulators in power electronics (original) (raw)

Hexagonal$Sigma Delta$Modulators in Power Electronics

IEEE Transactions on Power Electronics, 2005

Design techniques for 61 modulators from communications are applied and adapted to improve the spectral characteristics of high frequency power electronic applications. A high frequency power electronic circuit can be regarded as a quantizer in an interpolative 61modulator.Wereviewonedimensional61 modulators and then generalize to the hexagonal sigma-delta modulators that are appropriate to three-phase converters. A range of interpolative modulator designs from communications can then be generalized and applied to power electronic circuits. White noise spectral analysis of sigma-delta modulators is generalized and applied to analyze the designs so that the noise can be shaped to design requirements. Simulation results for an inverter show significant improvements in spectral performance.

Hexagonal$Sigma Delta$Modulators in Power Electronics

IEEE Transactions on Power Electronics, 2005

Design techniques for 61 modulators from communications are applied and adapted to improve the spectral characteristics of high frequency power electronic applications. A high frequency power electronic circuit can be regarded as a quantizer in an interpolative 61modulator.Wereviewonedimensional61 modulators and then generalize to the hexagonal sigma-delta modulators that are appropriate to three-phase converters. A range of interpolative modulator designs from communications can then be generalized and applied to power electronic circuits. White noise spectral analysis of sigma-delta modulators is generalized and applied to analyze the designs so that the noise can be shaped to design requirements. Simulation results for an inverter show significant improvements in spectral performance.

Hexagonal Sigma-Delta modulation

IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications, 2003

A novel application and generalization of sigma-delta (61) modulation has emerged in three-phase power-electronic converters. A conventional 61 modulator with scalar signals and binary quantizer is generalized to a 61 modulator with vector signals and a hexagonal quantizer. Indeed, power-electronic switching states may be thought of as determining the quantizer outputs. The output spectrum is a key performance measure for both communications and power electronics. This paper analytically derives the output spectrum of the hexagonal 61 modulator with a constant input using ergodic theory and Fourier series on the hexagon. The switching rate of the modulator is important for power-electronic design and formulas for the average switching rate are derived for constant and slowly varying sinusoidal inputs.

Power spectrum of a sigma-delta modulator with hexagonal vector quantization and constant input

ISCAS'99. Proceedings of the 1999 IEEE International Symposium on Circuits and Systems VLSI (Cat. No.99CH36349)

A new application of sigma-delta modulation has emerged in soft switching three phase power electronic converters. For this application, a conventional sigma-delta modulator with scalar signals and binary quantizer is generalized to a sigma-delta modulator with vector signals and a truncated hexagonal lattice quantizer. This vector sigma-delta modulator has an interesting output spectrum which is of importance in assessing performance and interpreting results. This paper analytically derives the output spectrum for the case of a generic constant input using ergodic theory and Fourier series on the hexagon.

Sigma-delta modulation of multi-phase high frequency converters

2010

Abstract A power conversion control architecture is proposed that merges advanced digital modulation techniques, high frequency resonant converters, and multi-phase converters. If a converter's switching frequency is high enough, the converter may be turned on and off quickly to modulate power flow. The proposed system is composed of several high frequency converters connected in parallel, only a few of which are active at a given time to regulate the output voltage.

New 2 2 Sigma Delta Modulators for Different Applications

International Journal of Recent Technology and Engineering (IJRTE), 2021

This work presents the design of a new 2-2 programmable sigma delta modulator architecture, for different applications, this transformation design of the ΣΔ modulator low-pass, band-pass and high-pass or vice versa with loopbacks addition, which improved the linearity of the converter and reduced the quantization noise. In this work, the MASH structure enables the implementation of stable and high-order modulator. This makes low voltage and low power applications ideal. The simulation result for sigma delta modulator for biomedical applications exhibit a signal to noise ratio is 95 dB @ 250Hz bandwidth and a 75dB @ 200KHz ,85dB @1MHz for pass band modulator. The SNR is about 70dB for 5MHz bandwidth and for high pass application. This tool will allow a development contribution and characterize a system optimization set from the start while remaining at a high level of design that is suitable for electronic systems and models VHDL-AMS, RF, Biomedical.

Comprehensive Analysis of Hexagonal Sigma-Delta Modulations for Three-Phase High-Frequency VSC Based on Wide-Bandgap Semiconductors

IEEE Transactions on Power Electronics, 2021

The efficiency of wide-bandgap (WBG) power converters can be greatly improved using high-frequency modulation techniques. This paper proposes using single-loop and double-loop hexagonal sigma-delta modulation (H-Σ∆ and DH-Σ∆ respectively) for voltage source converters (VSC) that use silicon carbide (SiC) semiconductors. These allow high switching frequencies to operate more efficiently than silicon devices. Thus, Σ∆ modulations are excellent candidates for taking advantage of WBG devices. The proposed modulation techniques allow working with a variable switching frequency, thus producing an extreme reduction in switching losses and mitigating the low-order harmonics in comparison with the classical space vector pulse width modulation (SVPWM) technique, and with the innovative variable switching frequency pulse width modulation (VSFPWM). The performance and losses of both Σ∆ techniques are analysed here using Matlab/Simulink and PLECS, and then compared with SVPWM and VSFPWM. Furthermore, the frequency spectrum and the total harmonic distortion (THD) are evaluated. Experimental results performed on a VSC converter that uses SiC MOSFETs show how H-Σ∆ and DH-Σ∆ greatly improve efficiency and generate fewer low-order harmonics than the SVPWM and VSFPWM strategies do.

A new method to synthesize and optimize band-pass delta-sigma modulators

2008 Joint 6th International IEEE Northeast Workshop on Circuits and Systems and TAISA Conference, 2008

An analysis and synthesis method for continuoustime (CT) band-pass delta-sigma modulators, applicable in parallel converters is presented in this paper. This method makes the design of band-pass delta-sigma modulators possible in a wide range of central frequencies and high DAC+ADC delays. This method is also applicable for narrow-band deltasigma converters in order to improve their performances. (Abstract) I.

A New Model for Sigma-Delta Modulator Oriented to Digitally Controlled DC/DC Converter

International Journal of Modelling and Simulation, 2007

Recent research activities have shown the feasibility and advantages of using digital controller ICs specifically developed for highfrequency switching converters, highlighting a challenging future trend in Switched-mode power supplies (SMPS) applications. Up to a few years ago, the application of digital control for SMPS was impractical due to the high cost and low performance of DSP and microcontroller systems, even if the advantages that digital

Improved Delta Sigma Modulators for high speed applications

2009 52nd IEEE International Midwest Symposium on Circuits and Systems, 2009

This article presents a new LowPass Delta Sigma Modulators (LPDS) architecture to improve the noise shaping for high frequency applications. The errors resulting from approximations made by calculating with 1/2 N coefficients are compensated. Simulations with extracted parasitics of the layout are made and give a SNDR of 111dB, 3.8mW power consumption at 4GHz in 65nm CMOS technology for UMTS standard.