Ultra-low-power design (original) (raw)

Picoradics for wireless sensor networks: the next challenge in ultra-low-power design

2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315), 2002

An untapped opportunity in the realm of wireless data lies in low data-rate (< 10 Kbit/sec) low-cost wireless transceivers, assembled into distributed networks of sensor and actuator nodes. This enables applications such as smart buildings and highways, environment monitoring, user interfaces, entertainment, factory automation, and robotics . While the aggregate system processes large amounts of data, individual nodes participate in a small fraction only (typical data rates <1 Kbit/sec). These ubiquitous networks require that the individual nodes are tiny, easily integrable into the environment, and have negligible cost.

PicoRadios for wireless sensor networks: the next challenge in ultra-low power design

2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315), 2002

Power and Energy Aware Design of an Autonomous Wireless Sensor Node

The design of Wireless Sensor Networks is a challenge, requiring to correctly balancing between performance, time, cost and energy. But the main problem with rechargeable WSNs is to predict at design time which will be the total system autonomy. Moreover, it depends on the energy h arvested from the environment, and we know that weather may be very unsettled. Thus, it is crucial to design and fine scale the entire power supply chain in order to produce a robust WSN. In this article, we propose an energy estimator able to handle environment like weather parameters to estimate the system autonomy. The key innovation comes from the capability to dynamically rebuild the models all along the project evolution with real measurements on the hardware and to include weather forecasts as dynamic parameters of the DPM policy. Finally, we have experiment various configurations and compared the hardware WSN against the simulator. The results have validated the relevance of the estimator for prospecting various energy problems. By experiment, the estimator has shown that most environmental energy was wasted due to the battery charging constraints. This will foresee the opportunities of energy gains, and the definition of newer extra power modes for the Dynamic Power Management. This work contributes to the domain for WSN design methodology, energy scavenging and energy management to optimize system autonomy. Low Power Design [11] advancement has recently moved onto a higher level with algorithmic dedicated implementation, and operating system advancement with power down modes, Dynamic Voltage and Frequency Scaling (DVFS), and power-aware scheduling. Thus, power reduction can be applied all along the co-design [12] by respecting a low power design methodology . The emerging wireless sensor network domain exists for a few years; however an increasing number of WSNs have been referenced . Technology integration improves and nodes tend to achieve lower size like Smartdusts, Picocube , and Hitachi RFID Tag. In this part, we focus on embedded system design methodology and more precisely method that can be applied to WSNs.

An Ultra-Low-Power, Batteryless Microsystem for Wireless Sensor Networks

Procedia Engineering, 2012

The capability to interact more ubiquitously with the surrounding physical world is a thriving force behind the widely ongoing research towards Wireless Sensor Networks (WSN). These sensor nodes however need to be very power efficient and very low-cost in order to be realistic on a large scale and to be economically viable. This work presents an ultra-low power, fully integrated UMC 130 nm CMOS node which operates autonomously. Energy is scavenged from RF waves while communication is performed with UWB.

Toward ultra low-power hardware specialization of a Wireless Sensor Network node

2009 IEEE 13th International Multitopic Conference, 2009

Research in micro-electro-mechanical systems (MEMS) technology, wireless communications, and digital electronics has enabled the future emergence of Wireless Sensor Networks (WSN). These systems consist of low-cost and lowpower sensor nodes that communicate efficiently over short distances. It has been shown that power consumption is the biggest design constraint for such systems. WSN nodes are being designed using low-power micro-controllers such as the MSP430. However, their power dissipation is still orders of magnitude too high. In this paper, we propose an approach to hardware specialization that uses the power-gated distributed hardware tasks. We target the control-oriented tasks running on WSN nodes and present, as a case study, a temperature monitoring application. Our approach is validated experimentally and shows prominent power gains over software implementation on a lowpower micro-controllers such as the MSP430.

System Level Synthesis for Ultra Low-Power Wireless Sensor Nodes

2010 13th Euromicro Conference …, 2010

Engineering hardware platform for a Wireless Sensor Network (WSN) node is known to be a tough challenge, as the design must enforce many severe constraints, among which energy dissipation is by far the most challenging one. Today, most of the WSN node platforms are based on low-cost and low-power programmable microcontrollers, even if it is acknowledged that their energy eciency remains limited and hinders the wide-spreading of WSN to new applications. In this paper, we propose a complete system level ow for an alternative approach based on the concept of hardware micro-tasks, which relies on hardware specialization and power gating to dramatically improve the energy eciency of the computational part of the node. Early estimates show power saving by more than one order of magnitude over MCU-based implementations.

Design and Validation of a Low-Power Network Node for Pervasive Applications

Pervasive computing refers to making many computing devices available throughout the physical environment, while making them effectively invisible to the user. To further increase the applicability of ubiquitous computing, minimizing energy consumption and hardware cost are mandatory in real world applications. In this paper we present our platform prototype for ubiquitous computing, which has been implemented based on commercial Bluetooth off-theshelf components. It allows every object to be augmented with processing and communication capabilities in order to make them "smart". We validate our proposal by evaluating the tradeoff between power consumption and performance for our experimental prototype. Our prototype has been used in a museum application to support ubiquitous computing between devices without requiring a priori knowledge of each other.

Wireless sensor node with low-power sensing

Facta universitatis - series: Electronics and Energetics, 2014

Wireless sensor network consists of a large number of simple sensor nodes that collect information from external environment with sensors, then process the information, and communicate with other neighboring nodes in the network. Usually, sensor nodes operate with exhaustible batteries unattended. Since manual replacement or recharging of the batteries is not an easy, desirable or always possible task, the power consumption becomes a very important issue in the development of these networks. The total power consumption of a node is a result of all steps of the operation: sensing, data processing and radio transmission. In most published papers in literature it is assumed that the sensing subsystem consumes significantly less energy than a radio block. However, this assumption does not apply in numerous applications, especially in the case when power consumption of the sensing activity is comparably bigger than that of a radio. In that context, in this work we focus on the impact of the sensing hardware on the total power consumption of a sensor node. Firstly, we describe the structure of the sensor node architecture, identify its key energy consumption sources, and introduce an energy model for the sensing subsystem as a building block of a node. Secondly, with the aim to reduce energy consumption we investigate joint effectiveness of two common power-saving techniques in a specific sensor node: duty-cycling and power-gating. Duty-cycling is effective at the system level. It is used for switching a node between active and sleep mode (with the dutycycle factor of 1%, the reduction of in dynamic energy consumption is achieved). Power-gating is used at the circuit level with the goal to decrease the power loss due to the leakage current (in our design, the reduction of dynamic and static energy consumption of off-chip sensor elements as constituents of sensing hardware within a node of is achieved). Compared to a sensor node architecture in which both energy saving techniques are omitted, the conducted MATLAB simulation results suggest that in total, thanks to involving duty-cycling and power-gating techniques, a three order of magnitude reduction for sensing activities in energy consumption can be achieved.

Energy Model for the Design of Ultra-Low Power Nodes for Wireless Sensor Networks

Procedia Chemistry, 2009

This article describes the modeling of a microsensor node for wireless sensor network applications. Considering the heterogeneous aspect of a sensor node, the developed model allows comparing different node configurations in order to make the best choice of components according to the specifications of the application. Therefore, our model allows identifying the need to design specific element or to use Components Of the Shelf.

Improving Robustness of Ultra-Low Power Systems through Power Reduction in Wired Signaling Circuits

The Internet of Things (IoT) will offer new levels of services and rich data sets. Services like health monitoring will be improved through more personalized care. Rich data sets provided by applications like infrastructure management will allow a better understanding of wear and tear on buildings and bridges, creating a safer environment for us to live in. In order to achieve this, IoT systems must be placed everywhere from inside clothing to monitor body functions, to inside concrete bridge structures to monitor vibrations. There will be no dedicated supply of power to nodes in these places, meaning that energy must be harvested from the environment. Due to the nature of energy harvesting circuits, the energy storage component should last through many charge cycles, especially in smaller form-factor applications. Existing commercial technologies last hundreds to few thousands of cycles and often require regular maintenance and periodic full discharge cycles to avoid damage, limiting their use in self-powered, IoT applications. Electrical energy storage in capacitors and super-capacitors provide a more robust solution, having a cycle life greater than 500000 cycles [1]. As a result, the energy efficiency and power consumption of IoT systems must be reduced to the power levels a capacitor or super-capacitor can deliver. Power is reduced by decreasing supply voltage and optimizing circuits, architectures, and system level knobs. Circuit level optimizations have a greater effect if they were previously contributing to a large portion of the ULP system budget. Circuits within this category are mainly analog, memory, and chip Input and Output (I/O). Analog and memory circuits are heavily researched, and lower power solutions are being developed. On the other hand, i Abstract ii ULP communication circuits have not been thoroughly researched, and optimizations can provide great reductions in both circuit and system power. Off-chip power reduction will allow for regular communication between nodes without needing to manage how often data is transmitted. ULP On-package communication will allow integration of different process technologies on the same chip, leveraging the best aspects of each process. On-chip communication can be improved to allow more fine-grained system level tuning to configure a platform for more desired operating modes. This dissertation presents techniques at both the circuits and systems level to reduce the power consumption and increase the level of integration of a proof of concept battery-less, self-powered, System in Package (SiP). The heart of these improvements are in communication. Techniques are introduced to improve power and energy of off-chip communication, and a transceiver for robust, wired, on-body networks is demonstrated. An ULP on-package cold-boot bus is presented, enabling integration of an ULP non-volatile memory for loading instructions when the system powers up. A flexible on-chip bus is implemented to allow fine-grained power and energy SoC optimization at the logic block level. Also presented are applications and improved test methods to facilitate commercialization of self-powered, battery-less platforms. A proof of concept relative positioning system is implemented to reduce reliance on high-power GPS radios, and provide positioning when a GPS signal cannot be acquired. Lastly a test methodology is presented for subthreshold SoCs to reduce functional test time by testing at a higher optimal voltage and predicting delay and power of the system at the lower operational voltage. Lower power communication, improved application space, and a faster test process will enable commercialization of systems. Having ubiquitous commercial battery-less platforms that are more robust will provide large sets of data to give insight to new areas of medical, industrial, and environmental research and will improve quality of life. The improved quality of life provided by these devices through an increase in personalized medical care and an abundance of sensor data will progress how our society works and interacts.

Ultra-low-power design (original) (raw)

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