FPGA Based High Performance Computing (original) (raw)
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MASAUM Journal of Computing, 2009
Algorithms used in signal processing, image processing and high performance computing applications are computationally intensive. For efficient implementation of such algorithms with efficient utilization of available resources, an indepth knowledge of the targeted field programmable gate array (FPGA) technology is required. This paper presents a state-ofthe-art review of the architectures and technologies used in modern FPGAs. A case study of most popular and widely used state-of-the-art commercial FPGA technologies from Xilinx and Altera is also presented in this paper. Upcoming three-Dimensional (3D)-FPGA architecture is also discussed.
Accelerating High Performance Computing Applications: Using CPUs, GPUs, Hybrid CPU/GPU, and FPGAs
2012 13th International Conference on Parallel and Distributed Computing, Applications and Technologies, 2012
Most modern scientific research requires significant advanced modeling, simulation, and visualization. Due to the growing complexity of physical models, these research activities increasingly are requiring more and more High Performance Computing (HPC) resources and this trend is predicted to grow even stronger. Considering this growth in HPC applications, the traditional parallel computing model based solely on Central Processing Units (CPUs) is unable to meet the scientific needs of the researchers. HPC requirements are expected to reach exascale in this decade. There are several approaches to enhance and speed up HPC; some of the most promising involve hybrid solutions. In this paper, we describe existing state of hardware and accelerators for HPC. Such components include CPUs, Graphics Processing Units (GPU), and Field-Programmable Gate Arrays (FPGAs). Various hybrid implementations of these accelerators are presented and compared. Examples of the top supercomputers are included as well, together with their hardware configurations. Concluding this paper, we discuss our prediction of further HPC hardware trends in support of advanced modeling, simulation, and visualization.
… , Signal Processing and …, 2009
Algorithms used in signal and image processing applications are computationally intensive. For optimized hardware realization of such algorithms with efficient utilization of available resources, an in-depth knowledge of the targeted field programmable gate array (FPGA) technology is required. This paper presents an overview of the architectures and technologies used in modern FPGAs. A case study of most popular and widely used state-of-the-art commercial FPGA technologies from Xilinx and Altera is also presented. Three-Dimensional (3D)-FPGA architecture is also discussed.
2019
During recent years, the population of internet users has sharply increased and more applications are utilizing data centers. Telecommunication companies are constantly trying to make communication applications faster to provide faster cellular networks. Moreover, recent computation applications have been analysing very big data and need higher performance. On the other hand, transistor scaling has almost come to its end, which makes it difficult to provide higher performance and efficiency in processors. As a solution, applicationspecific hardware platforms are used to accelerate the applications and improve the performance, energy consumption, and latency. Field programmable gate arrays (FPGAs) are the most popular means of hardware acceleration since they are reprogrammable and consume relatively low power. Connecting FPGAs to servers through high-speed PCIe links is the most common way of deploying them in data centers. However, FPGA resources will not be efficiently used if the...
White Paper HIGH PERFORMANCE COMPUTING ON FPGAs
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Introduction .................................................................................................... 1 Current Technology .......................................................................................... 2 Case Study ...................................................................................................... 3 Challenges ...................................................................................................... 7 Summary ........................................................................................................ 8
Parallel Computing with FPGAs - Concepts and Applications
The Mini-Symposium "Parallel computing with FPGAs" aimed at exploring the many ways in which field programmable gate arrays can be arranged into high-performance computing blocks. Examples include high-speed operations obtained by sheer parallelism, numerical algorithms mapped into hardware, co-processing time critical sections and the development of powerful programming environments for hardware software co-design.
Designing a novel high-performance FPGA architecture for data intensive applications
Journal of Real-Time Image Processing, 2009
A wide variety of real-time applications (e.g. multimedia, communication, etc.) require implementations that meet tight timing constraints. This work introduces novel high-performance FPGA architecture capable of implementing efficiently any time critical application. The fundamental contribution of the proposed reconfigurable architecture is the design of a highly efficient (performance and power consumption) interconnection structure, taking into consideration the statistical and spatial data extracted from applications, which are implemented on Virtex FPGAs. The derived architecture is software-supported by the MEANDER design framework. Using a number of realtime applications, extensive comparison study in terms of several design parameters proves the effectiveness of the proposed architecture against to Virtex one. More specifically, the proposed architecture achieves performance improvement and power savings up to 20 and 16%, respectively. Moreover, compared to a Virtex architecture with same power budget, our architecture achieves performance improvement by 42%.
The FPGA High-Performance Computing Alliance Parallel Toolkit
Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), 2007
We describe the FPGA HPC Alliance's Parallel Toolkit (PTK), an initial step towards the standardization of high-level configuration and APIs for high-performance reconfigurable computing (HPRC). We discuss the motivation and challenges of reaping the performance benefits of FPGAs for memory-bound HPC codes and describe the approach we have taken on the FHPCA supercomputer Maxwell.
A New Approach to Control and Guide the Mapping of Computations to FPGAs
2011
Abstract-Field-Programmable Gate-Arrays (FPGAs) are becoming increasingly popular as computing platforms for high-performance embedded systems. Their flexibility and customization capabilities allow them to achieve orders of magnitude better performance than conventional embedded computing systems. Programming FPGAs is, however, cumbersome and error-prone and as a result their true potential is often only achieved at unreasonably high design efforts.