Solder bumping via paste reflow for area array packages (original) (raw)
Related papers
Metals and Materials International, 2013
Stencil printing for flip chip packaging using fine particle solder pastes is a low cost assembly solution with high throughput for fine pitch solder joint interconnects. The manufacturing challenges associated with both solder paste printing increases as electronic device size decreases due to trend of miniaturization in electronic components. Among multiple parameters, the two most important stencil printing parameters are squeegee pressure and printing speed. In this paper, the printing behavior of Pb free Sn-3Ag-0.5Cu solder paste with a particle size distribution of 2-12 µm for wafer level bumping using a stencil printing method (stencil opening dimension-30 µm) was evaluated by varying the printing speed and squeegee pressure to fabricate solder bumps with a sub 100 µm size. The optimal squeegee pressure and print speed for the defect free printing behavior and fairly uniform size distribution of reflowed paste were found to be 7 kgf and 20 mm/s, respectively. The average size of the reflowed printed paste decreased with the increasing squeegee pressure.
Stencil printing technology for wafer level bumping at sub-100 micron pitch using Pb-free alloys
Electronic …, 2005
In this paper solder paste printing is reported at sub 100µm pitch using Pb-free solder paste with IPC type-6 (15-5µm) particle size distributions. The results confirm that consistent sized paste deposits can be produced onto wafers at ultra fine pitch geometries using a stencil printing process. Furthermore, a stencil printing evaluation has determined the impact that the print parameters have on the reproducibility of the deposits. The investigation also reveals that the volume of solder paste deposit can be controlled by selecting different shapes of stencil apertures. Large volumes of paste are required during reflowing of the fine particle solder paste to produce sufficient stand-off between the flip chip device and substrate. Print consistency and uniformity of the bumps generated are also governed by the volume of solder paste for each deposit. Statistical examinations of printing defects from a large number of printing trials have been conducted for several bump geometries. Subsequently the best print parameters were then used to print onto wafers containing bond pads so the paste deposits could be reflowed to form solder spheres for analysis.
Microelectronic Engineering, 2011
The reliability of solder joints in electronic products are greatly enhanced by good stencil printing and quality reflow soldering. The stencil printing process is widely used in Surface Mount Technology (SMT) to deposit solder paste on the substrate and is a critical step in SMT assembly as it has been widely claimed that up to 50% of the defects found in the assembly of printed circuit boards (PCBs) are attributed to stencil printing. Solder paste release from stencil during printing is a key factor which affects the quality of solder prints. Thus, the efficient transfer of paste from stencil through aperture to pad is a fundamental concern in SMT production process. The recent trends on further miniaturisation of electronic products have introduced more process challenges in the SMT assembly. The assembly of surface mount packages such as flip chips, chip scale packages and fine pitch ball grid arrays are challenging the current stencil printing and reflow profiling capabilities. The effective mounting of these miniaturised packages requires good transfer efficiency of solder paste through small stencil aperture. As further electronic product miniaturisation culminates in progressive use of decreasing stencil aperture sizes, the in-depth understanding of the dependency of transfer efficiency of solder paste on diminishing stencil aperture areas has become vital to improving solder joint reliability. This study investigates the transfer efficiency of type 3, 96.5Sn3.0Ag0.5Cu solder paste through linearly decreasing rectangular stencil aperture sizes typically used in PCB assembly. In addition, the research examines the effects of optimal reflow profile (ORP) on the solder deposit volumes. The results from the study show a power law relationship between actual solder deposit volume (SDV) and aperture cavity. The observed effect of ORP on actual SDVs was a 46% volume change which was fairly constant across the pad geometries.
Statistical analysis of stencil technology for wafer-level bumping
Soldering & Surface Mount Technology, 2014
Purpose-Wafer-level stencil printing of a type-6 Pb-free SAC solder paste was statistically evaluated at 200 and 150 mm pitch using three different stencil manufacturing technologies: laser cutting, DC electroforming and micro-engineered electroforming. This investigation looks at stencil differences in printability, pitch resolution, maximum achievable bump height, print co-planarity, paste release efficiency, and cleaning frequency. The paper aims to discuss these issues. Design/methodology/approach-In this paper, the authors present a statistical evaluation of the impact of stencil technology on type-6 tin-silvercopper paste printing. The authors concentrate on performances at 200 and 150 mm pitch of full array patterns. Key evaluated criteria include achievable reflowed bump heights, deposit co-planarity, paste release efficiency, and frequency of stencil cleaning. Box plots were used to graphically view print performance over a range of aperture sizes for the three stencil types. Findings-Fabrication technologies significantly affect print performance where the micro-engineered electroformed stencil produced the highest bump deposits and the lowest bump height deviation. Second in performance was the conventional electroformed, followed by the laser-cut stencil. Comparisons between the first and fifth consecutive print demonstrated no need for stencil cleaning in the case for the micro-engineered stencil for all but the smallest spacings between apertures. High paste transfer efficiencies, i.e. above 85 per cent, were achieved with the micro-engineered stencil using low aperture area ratios of 0.5. Originality/value-Stencil technology influences the maximum reflowed solder bump heights achievable, and bump co-planarity. To date, no statistical analysis comparing the impact of stencil technology for wafer-level bumping has been carried out for pitches of 200 mm and below. This paper gives new insight into how stencil technology impacts the print performance for fine pitch stencil printing. The volume of data collected for this investigation enabled detailed insight into the limitations of the printing process and as a result for suitable design guidelines to be developed. The finding also shows that the accepted industry guidelines on stencil design developed by the surface mount industry can be broken if the correct stencil technology is selected, thereby increasing the potential application areas of stencil printing.
The International Journal of Advanced Manufacturing Technology, 2019
The present study examines the effect of squeegee load, squeegee speed, and separation speed on the printing performance of lead-free solder paste, and solder printing was carried out to evaluate the effect of the filled volume of the solder paste during stencil printing. Application of pressure on the squeegee affects the filled volume of the solder paste in the stencil aperture, and the incorrect pressure setting could cause incomplete filling. Herein, an experiment was conducted on a printing machine employing surface mount technology. The solder paste used in the study was Sn/Ag/Cu (SAC305), and four components, namely, 0603, small outline transistor (SOT), 1210, and tantalum-D, were tested. The filled volume and height of the solder paste under different squeegee loads, squeegee speeds, and separation speeds were determined, and the solder volume was found to vary with the squeegee load and component type. Response surface method (RSM) optimization is conducted to obtain optimum filled volume and solder paste height and area during the printing process. The method showed squeegee load, squeegee speed, and separation speed have considerable effects on filled volume, solder paste height, and solder paste area.
Mask and mask-less injection molded solder (IMS) technology for fine pitch substrate bumping
International Symposium on Microelectronics, 2010
We report the results of a new pre-solder bumping technology of injection molded solder (IMS) for fine pitch organic substrates. Pure molten solder is injected through a reusable film mask (mask IMS) or directly injected without a mask (mask-less IMS) on the pads of an organic substrate to overcome the limitation of current pre-solder bumping technologies such as solder paste stencil printing and micro-ball mounting. In the case of mask IMS, targeted solder height over the solder resist (SR) is designed into the mask which has desirable thickness and hole sizes. Three different solder bump heights such as 30, 50, and 70 microns over SR were demonstrated for commercial organic substrates which have a pitch of 150 μm for 5,000 area array pads. To show the extendibility of the mask IMS bumping method to very fine pitch applications, 100 μm pitch bumping of 10,000 pads and 80 μm pitch bumping of 15,000 pads were demonstrated. In mask-less IMS, the pure molten solder is directly filled i...
Solder paste for fine line printing in hybrid microelectronics
Microelectronics Journal, 1995
A series of experiments was performed to evaluate the deposit consistency of solder paste from various producers, for fine line printing. Two main variables were chosen to determine the quality of the solder paste printing process. The results of a two-factorial experimental design are presented and the effect: of these factors on solder paste thickness and visual appearance are discussed.
As the density of board design increasing fast, the distance between the adjacent components becomes much smaller. When the miniature chip components and the fine pitch components which require smaller volumes of solder paste are close to the castle-like components, connectors with poor pin co-planarity and CCGAs which require more solder paste, only one single thickness stencil could not satisfy all of the components at the same printing process. At present, the step stencil is the cheapest and most popular solution, but the layout density could not increase more because of the keep-out distances. The objective of this iNEMI Solder Paste Deposition Project is to understand the major factors to step stencil printing quality and where are the limitations.
Soldering & Surface Mount Technology, 2019
Purpose The purpose of this paper is to investigate and minimize the printing-related defects in the surface mount assembly (SMA) process. Design/methodology/approach This paper uses an experimental approach to explore process parameter and printing defects during the SMA process. Increasing printing performance, various practices of solder paste (Ag3.0/Cu0.5/Sn) storage and handling are suggested. Lopsided paste problem is studied by varying squeegee pressure and the results are presented. Unfilled pads problems are observed for ball grid array (BGA) and quad flat package (QFP) which is mitigated by proper force tuning. In this paper, a comparative study is conducted which evaluates the manifestation of printing offset due to low-grade stencil. The input/output (I/O) boards were oxidized when the relative humidity was maintained beyond 70 per cent for more than 8 h. This pad oxidation problem is overcome by proper printed circuit board (PCB) handling procedures. When the unoptimize...