Formal definition and properties of FEB-based ENOB of intelligent cyclic ADC (original) (raw)
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FEB-based approach to the measurement of effective resolution of cyclic ADC
Abstract-The goal of the paper is presentation of a new approach to the measurement of effective resolution (effective number of bits-ENOB) of the cyclic A/D converters (CADCs). The core idea of the approach is direct measurement of ENOB using, as a numerical measure, the number of true bits before the first erroneous bit (FEB) position. The position of FEB is determined as the first non-zero bit in the binary presentations of conversion errors. The definition of ENOB based on FEB is introduced and discussed. The particularities of ...
FEB-based approach to the measurement of effective resolution of cyclic ADC 1
The goal of the paper is presentation of a new approach to the measurement of effective resolution (effective number of bits -ENOB) of the cyclic A/D converters (CADCs). The core idea of the approach is direct measurement of ENOB using, as a numerical measure, the number of true bits before the first erroneous bit (FEB) position. The position of FEB is determined as the first non-zero bit in the binary presentations of conversion errors. The definition of ENOB based on FEB is introduced and discussed. The particularities of the proposed method are analysed in simulation experiments. There are presented typical evolutions of FEB distributions in sequential cycles of conversion. Values of ENOB obtained using FEB-based method are compared with results obtained using the conventional approach to ENOB assessment. The comparison is performed on example of analysis of influence of DNL and INL errors of internal A/D converter on ENOB of CADC. The proposed method of the ENOB measurement gives more adequate information about the actual ADC resolution and weakens the influence of the form of testing signals on the results of the ENOB measurement.
Particularities of the Cyclic A/D Converters ENOB Definition and Measurement
… IMTC 2006. Proceedings of the IEEE, 2006
The paper is devoted to methods of accurate assessment of expected and real effective number of bits (ENOB) of cyclic A/D converters. There is discussed the equivalence of definition of ENOB in IEEE Standard 1241-2000 and analytical definition of ENOB used in our previous works. Generalization of ENOB definition is discussed, which enables its accurate application to analysis and testing of the cyclic and pipe-line ADCs performance. The indirect and direct methods of ENOB assessment are discussed. The results of the paper can be used for development of reliable procedures for analysis and testing of ADC performance.
Analytical and empirical ENOB in evaluation analysis of cyclic A/D coverters performance
2005
The paper is devoted to the problem of accurate assessment of the expected and real effective number of bits (ENOB) of the cyclic A/D converter. The analysis is performed on the example of sub-optimal intelligent cyclic ADC (IC ADC). There is shown the equivalence of definition of ENOB in IEEE standard and analytical measures of IC ADC performance used. The non-direct and direct methods of ENOB assessment are discussed. The obtained results can be used for development of mathematically based procedures of actual ADC ...
Principles of optimisation, modelling and testing of intelligent cyclic A/D converters
Measurement, 2006
The goal of the paper is a discussion of possibilities, methods and results of application of the optimal signal processing technique to design and optimisation of the cyclic A/D converters (CADC). New effects appearing in CADC computing the codes of the input samples using optimal signal processing algorithms and long-word binary arithmetic, are analysed. There is shown that the intelligent CADC (ICADC) built on this principle most efficiently utilise the resources of their analogue and digital parts, and their performance may achieve theoretically available upper boundaries. Analytical expressions for upper boundaries of sub-optimal ICADC resolution, speed of conversion and information capacity are presented. Principles of ICADC computer analysis and assessment of their performance, as well as the questions of practical implementation of the converters are discussed.
Particularities of cyclic intelligent ADC design, implementation and adjusting
2008 International Conference on Signals and Electronic Systems, 2008
The paper presents the results of design, implementation and adjusting of the CMOS version of the hardware prototype of new "intelligent" cyclic analog-to-digit converter (IC ADC). There are presented the concept of intelligent conversion, main principles of practical implementation, main stages and particularities of design and adjusting the IC ADC.
Information properties of sub-optimal cyclic ADC with algorithmic estimates forming
The goal of the paper is ńe analysis of resolution and informdion characteristics of a new class of suboptinral cvclic analoguc-to-digital conveńers (CADC) wiń the adaplve algorithmic e §titnates forming. These converters differ fron the other ADC by complex hardware and softlvare optimisation peńormcd using tlre extended algoritlrms derived in [ 1,2'|, Thc results of optinrisation ensure the improvement of resolution and speed of convcrsion till the values unachiwable for ońer versions of converters. The conncction between cADc resolution and infonrration capacity is analysed. There is shown ńat complex optimisation of CADC ensure § full utilisation of ńeir information capacity undcr guarantced small probability ofthe rough enors ofconversion. Kel,rvords: adaptive cvclic ADC, extended algorithms of conversion, infonnation capactty of CADC.
2013
A bs trac t-The paper is devoted to the new effective architectures and conversion algorithms used in adaptive sub-ranging analog-to-digital converters (ADCs) whose digital parts allow the iterative calculation of output codes using digital estimation algorithms. Two classes of adaptive sub-ranging ADCs, i.e. recursive (cyclic) and pipeline ADCs, are considered in the paper. The paper develops the earlier research on the adaptive sub-ranging ADCs and removes the crucial disadvantages of these converters simplifying their architectures, i.e. decreasing significantly the high resolution of internal D/A sub-converters and very large values of internal amplifiers gains. The appropriate new conversion algorithms and the results of simulation experiments which compare ADC employing the proposed converter with the existing pipeline ADC are presented and discussed.
New Class of High-efficient Intelligent Cyclic ADCs. Backgrounds, Methods of Design and Testing
Proceedings of SPIE - The International Society for Optical Engineering
The paper presents a brief survey of new results in the theory, modelling, implementation and testing of new class of high-efficient low-energy cyclic A/D converters (CADC) -"intelligent" cyclic ADC (IC ADC). There are discussed general principles of IC ADC functioning, analysis and design, Advantages of IC ADC over conventional CADC caused by transition to computing of the long-bit codes (estimates) of the input signal are explained. Special attention is paid to particularities and methods of modelling analysis and testing of IC ADC. Downloaded From: http://journals.spiedigitallibrary.org/ on 12/10/2014 Terms of Use: http://spiedl.org/terms Proc. of SPIE Vol. 6347 63472L-5 Downloaded From: http://journals.spiedigitallibrary.org/ on 12/10/2014 Terms of Use: http://spiedl.org/terms Proc. of SPIE Vol. 6347 63472L-6 Downloaded From: http://journals.spiedigitallibrary.org/ on 12/10/2014 Terms of Use: http://spiedl.org/terms