Design of conservative, reversible sequential logic for cost efficient emerging nano circuits with enhanced testability (original) (raw)

The CMOS faces challenges related to the increment in leakage-current to power-consumption. QCA is a promising alternative to overcome these challenges successfully. On the other hand, reversible logic plays a significant role in quantum-computing. Keeping this technique in mind, a conservative-reversible flip-flops and counter are explored here which will bring QCA and reversible computing together in a single-platform. In synthesizing, a reversible-conservative-quantum-cellular-automata (R-CQCA) is proposed. The proposed D, T, JK and dual-edge master-slave flip-flops advocate an improvement of 20%, 46.6%, 50%, and 36.66% respectively than its counterpart in quantum-cost. Further, the 100% fault-coverage by stuck-fault is framed in R-CQCA, which can be useful for a tester to maintain data-integrity. Also, the R-CQCA layout is implemented in QCA, which achieve some parameters such as cell-complexity of 177, leakage-energy-dissipation of 0.1055 eV, and size of 0.24 mm 2. Moreover, R-CQCA is better than FRG, RM, PPRG and MX-cqca regarding QCA-primitives are reported here. One of the major limitations of CMOS technology is its high power consumption. This problem cannot be completely solved even by further scaling the size of the transistor. A possible solution is to develop new computational paradigms based on quantum technologies. In this way, the reversible logic technique is a primary part of quantum technology because of the unitary property of quantum computations [1]. They enormously deal with low energy dissipation. Landauer [1] pointed that logic computation that is non-reversible essentially dissipates heat energy. Bennett [2] pointed that no energy dissipation is possible only if a design includes reversible gates. The feature of reversible gates bijections property from the input states to the output states, and have consequently recovered outputs from inputs. The primary abstract behind the conservative logic of the observable operations for the manipulation of Ex-OR of the inputs and outputs. In fact, conservative reversible logic is an equal hamming weight used in inputs and outputs to ensure the observance of testability [3]. The novelty of the proposed designs around quantum computing paradigm is the realization of a quantum equivalent of a sequential circuit with low quantum cost. Sequential circuits are the fundamental parts in various digital VLSI circuits such as memory, general purpose register and accumulation for the processor. In this paper, we target on synthesizing conservative reversible (CR) flip-flops and Binary-coded decimal (BCD) ripple counter with low quantum cost (QC) using R-CQCA, which will be illustrated in Sec. 4. The proposed circuits focus on the quantum equivalent realization (QER) through some additional coding in RCviewer+ tool. The exact QC are obtained after QER of the circuit. The construction of QER from the elementary gates such as CNOT, NOT, C-V, and C-V +. A new R-CQCA gate strongly alters the circuit cost of reversible sequential circuits. The proposed circuits more competent and best suitable for such as general purpose register and the memory element. The proposed gate R-CQCA has a wide utility such as universal gates (NAND, NOR), multiplexer (mux), flip-flops (FFs), and counter. The proposed R-CQCA contains only 6 quantum cost (QC), very few conservative reversible gates (CRGs) that have such value of the QC. This work includes the following contributions: We designed a low QC, R-CQCA for NANO-Electronics application. We present the QCA robust structure of R-CQCA, and the simulation outcomes specify the correct functionality and also the low worst case latency of 2.5 is reported here.