Optimal synthesis of multiple output Boolean functions using a set of quantum gates by symbolic reachability analysis (original) (raw)

Quantum logic synthesis by symbolic reachability analysis

Proceedings of the 41st …, 2004

Reversible quantum logic plays an important role in quantum computing. In this paper, we propose an approach to optimally synthesize quantum circuits by symbolic reachability analysis where the primary inputs are purely binary. We present an exact synthesis method with optimal quantum cost and a speedup method with non-optimal quantum cost. Both our methods guarantee the synthesizeability of all reversible circuits. Unlike previous works which use permutative reversible gates, we use a lower level library which includes non-permutative quantum gates. Our approach obtains the minimum cost quantum circuits for Miller's gate, half-adder, and full-adder, which are better than previous results. In addition, we prove the minimum quantum cost (using our elementary quantum gates) for Fredkin, Peres, and Toffoli gates. Our work constitutes the first successful experience of applying satisfiability with formal methods to quantum logic synthesis.

Quantum Computing Application for Cost Reduction Technology Using Reversible Logical Synthesis

2021

Using Toffoli and Feynman gates, Peres gate, and SMG gate, three prototypes of reversible two's complement adder / subtractor are planned and compared. Following that, three reversible circuit designs for implementing a 2's complement circuit of adder / subtractor including an overflow detection is built in and got it checked too. Then, a reversible form of BCD circuit is implemented and is created and checked at the same time. For the previous designs, the binary coded decimal adder designs are checked and quantitatively evaluated. Quantum cost, delay, and transistor cost are all considered when evaluating reversible circuits. Classical graph theory algorithms are considered, and quantum techniques such as the quantum minimum finding algorithm are applied to them in order to solve them in a quantum computer and thus compute their query complexity. The median of a graph and the middle of a graph are determined using quantum query complexity in both a classical and quantum method to define the 'Service Facility Location Problem' and the 'Emergency Facility Location Problem,' respectively. The related project parameters should be handled proactively, and a technical manager should be able to predict the project outcome. Technical administrators are mostly concerned with the end result. Instead, they should concentrate on proactively monitoring and mitigating defect leakage at the outset. In a quantum project functionally the predictive models are applicable to test the defects, that overall helps in the reduction of residual defects.

Synthesis of quantum-logic circuits

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2006

The pressure of fundamental limits on classical computation and the promise of exponential speedups from quantum effects have recently brought quantum circuits [10] to the attention of the Electronic Design Automation community . We discuss efficient quantum logic circuits which perform two tasks: (i) implementing generic quantum computations and (ii) initializing quantum registers. In contrast to conventional computing, the latter task is nontrivial because the state-space of an n-qubit register is not finite and contains exponential superpositions of classical bit strings. Our proposed circuits are asymptotically optimal for respective tasks and improve earlier published results by at least a factor of two.

Optimized Boolean expression embedding in quantum and reversible logic circuits

AIP Conference Proceedings

The quantum and reversible circuits represent a promising replacement of conventional computers in many applications in the future. The transition between conventional computing and this alternative is indeed a huge paradigm shift. During the transition, embedding of conventional Boolean logic functions and expressions within quantum and reversible logic circuits has to be considered, because conventional computing is generally based on Boolean algebra. This embedding comes with a serious drawback of additional increase in the problem complexity represented by additional constant inputs, the so-called ancillary lines. An algorithmic optimization technique is suggested in this paper to reduce the number of these ancillary lines. With this algorithm embedding of Boolean expressions within reversible/quantum circuits comes out with minimal increase in circuit cost and gate count in the optimized circuits.

Two-Qubit Quantum Gates to Reduce the Quantum Cost of Reversible Circuit

2011

This paper presents a quantum gate library that consists of all possible two-qubit quantum gates which do not produce entangled states. The quantum cost of each two-qubit gate in the proposed library is one. Therefore, these gates can be used to reduce the quantum costs of reversible circuits. Experimental results show a significant reduction of quantum cost in benchmark circuits. The resulting circuits could be further optimized with existing tools, such as quantum template matching.

Minimized reversible/quantum synthesis of non-reversible quinary logic function

International Conference on Computer and Information Technology, 2011

Reversible/quantum multiple-valued logic circuit has several advantages over reversible/quantum binary logic circuit. Galois field sum of products (GFSOP) based synthesis of multiple-valued logic function is more promising and practical than other approaches. In this paper, we have developed 196 Galois field expansions (GFE) and have proposed a method of minimization of GFSOP expression for non-reversible quinary logic function using the

Improving the quantum cost of reversible Boolean functions using reorder algorithm

Quantum Information Processing, 2018

This paper introduces a novel algorithm to synthesize a low-cost reversible circuits for any Boolean function with n inputs represented as a Positive Polarity Reed-Muller expansion. The proposed algorithm applies a predefined rules to reorder the terms in the function to minimize the multi-calculation of common parts of the Boolean function to decrease the quantum cost of the reversible circuit. The paper achieves a decrease in the quantum cost and/or the circuit length, on average, when compared with relevant work in the literature.

Cost Reduction in Nearest Neighbour Based Synthesis of Quantum Boolean Circuits

Engineering Letters, 2008

Quantum computer algorithms require an 'oracle' as an integral part. An oracle is a reversible quantum Boolean circuit, where the inputs are kept unchanged at the outputs and the functional outputs are realized along ancillary input constants (0 or 1). Recently, a nearest neighbour template based synthesis method of quantum Boolean circuits has been proposed to overcome the adjacency requirement of the input qubits of physical quantum gates. The method used SWAP gates to bring the input qubits of quantum CNOT or C 2 NOT gates adjacent. In this paper, we propose cost reduction techniques such as ancillary constant determination to reduce the number of NOT gates and variable ordering and product grouping to reduce the number of SWAP gates required in nearest neighbour template based synthesis. The proposed approach significantly reduces the quantum realization cost of the synthesized quantum Boolean circuit than that of the original nearest neighbour template based synthesis.

EFFICIENT APPROACH TO OPTIMIZE QUANTUM COST FOR COMBINATIONAL REVERSIBLE CIRCUITS

IJRCAR, 2014

Abstract—Conventional digital circuits dissipate a significant amount of energy because bits of information are erased during the logic operations. Thus, if logic gates are designed such that the information bits are not destroyed, the power consumption can be reduced dramatically. The information bits are not lost in case of reversible computation. This has led to the development of reversible gates. This Paper introduces new synthesis approach called Exorlink which reduces quantum cost compared to the technique Disjoint Sum of Products (DSOP) when used in the design of reversible circuits. The design is coded in VHDL, simulated using ISIM and synthesized using Xilinx ISE 10.1i for the device Spartan3E FPGA