Integration of Silicon with Passive Devices Yields Advantages in Wireless Design (original) (raw)
Related papers
On-Chip versus Off-Chip Passives in Radio and Mixed-Signal System-on-Package Design
2006 1st Electronic Systemintegration Technology Conference, 2006
Advances of VLSI and packaging technologies enable condensed integration of system level functions in a single module, known as SoC and SoP. In order to find a better solution between SoC and SoP, and eliminate constraints between chip and package, a complete solution is needed to co-design and co-optimize chip and package in a total design plan with precise trade-offs of on-chip versus off-chip passives. In this paper, we present a complete and systematic design methodology for RF SoP/SoC. This methodology includes early analysis and design implementation. This early analysis is to estimate the performance and cost of each solution quickly and quantitively. Then, the best solution is found and implemented. For a better presentation, the method and design techniques are demonstrated through the design of a common emitter low noise amplifier (LNA) for 5GHz wireless LAN (local area network). Analytical equations of noise figure and transducer gain for the LNA with lossy package are also developed.
MICROWAVE ICs Design and Technology Tradeoffs in Passive RF and Microwave Integrated Circuits
2010
D esigners of RF and microwave integrated circuits often go through numerous design iterations. The tradeoff design process reduces unnecessary costs and design iterations, thus allowing designers time to improve the quality of the product. Modern technology for RF and microwave integrated circuits (ICs) provides smaller size, lighter weight, and lower cost. Passive components play a key role in RF designs for performance matching, tuning, filtering, and biasing. Passive components are prevalent in RF and microwave IC. For example, it is estimated that in a single-mode wireless phone, passive components account for 90% of the component count, 80% of the size, and 70% of the cost [1]. RF and microwave ICs are usually based on these passive printed components: directional couplers, baluns, power dividers/ combiners, filters, phase shifters, ferrite isola-tors/circulators, and duplexers. In this paper we will consider the design tradeoffs for passive printed RF and microwave components...
Modeling of integrated RF passive devices
IEEE Custom Integrated Circuits Conference 2010, 2010
We describe the use of an electromagnetic (EM) simulator for modeling integrated RF components and circuits. Modern EM simulators are fast and accurate enough to provide good models of such components. An important aspect of advanced IC processes is that the physical properties of wires (width, thickness, and resistance) vary depending on the surrounding wiring. We discuss how the EMX simulator [1] handles widthand spacing-dependent properties in the process description. Because the simulator handles mask-ready layout without the need for manual simplification, it is feasible to simulate thousands of possible designs and build scalable component models. Such scalable models allow fast choices of optimal components that meet user-supplied specifications.
High-Q integrated RF passives and RF-MEMS on silicon
MRS Proceedings, 2003
ABSTRACTA technology platform is described for the integration of low-loss inductors, capacitors, and MEMS capacitors on a high-resistivity Si substrate. Using this platform the board space area taken up by e.g. a DCS PA output impedance matching circuit can be reduced by 50%. The losses of passive components that are induced by the semi-conducting Si substrate can effectively be suppressed using a combination of surface amorphisation and the use of poly crystalline Si substrates. A MEM switchable capacitor with a capacitance switching factor of 40 and an actuation voltage of 5V is demonstrated. A continuous tuneable dual-gap capacitor is demonstrated with a tuning ratio of 9 using actuation voltages below 15V.
The Fifth International Conference on Advanced Semiconductor Devices and Microsystems, 2004. ASDAM 2004., 2004
High-resistivity polycrystalline silicon (HRPS) wafers are explored as a novel low-cost and low-loss substrate for radio-frequency (RF) passive components in wafer-level packaging (WLP) and integrated passive networks. A record quality factor (Q=11; 1 GHz; 34 nH) and very low loss (0.65 dB/cm; 17 GHz) are demonstrated for inductors and coplanar wave guides, respectively. The waferlevel packaging solution is based on an adhesive bonding of a passive HRPS wafer to an active silicon IC wafer, where the HRPS wafer serves as a mechanical carrier and vertical spacer. This enables integration of large RF passives with a vertical spacing of >150 µm to the conductive silicon substrate containing the circuitry, while providing mechanical stability, reducing form factor and avoiding any additional RF loss. The HRPS substrates have high dielectric constant, low RF loss, high thermal conductivity, perfect thermal matching, and processing similar to the single-crystalline silicon.
Design Enablement for RF and Microwave Ic Design: Part II
shows the mathematical representation of BPV in action for the PSP model. The variances of e are input directly from the PCM. The PSP sensitivity matrix is calculated directly within the circuit simulator. The system determines the variances of p (σ 2 δp ), which guarantees alignment of the simulated and measured variances of e. The 1-σ values of p are then input to the Monte Carlo statistical simulation tool within the design environment or scaled to produce corner models. The results are accurate in most cases to < 0.5 percent. This technique is employed across all device types, utilizing all the available PCM. In addition to accurate simulation of individual e, physical correlations among
Chip-package codesign of a low-power 5GHz RF front end
Proceedings of The IEEE, 2000
Future high-performance wireless communication applications such as wireless local area networks (WLANs) around 5 GHz require low-power and highly integrated transceiver solutions. The integration of the RF front end especially poses a great challenge in these applications, as traditional front-end implementations require a large number of external passive components. In this paper, we present the single-package integration of complete transceivers based on a thin-film multichip module (MCM) technology with integrated passives. The MCM substrate is a common carrier onto which different ICs are mounted. Passive components such as RF bandpass filters, inductors, capacitors, and resistors are directly integrated into the MCM substrate with the use of the multilayer structure of the MCM technology. The "system-on-a-package" approach is illustrated with a voltage-controlled oscillator for Digital European Cordless Telephone (DECT) applications and a 5-GHz WLAN front end. These examples indicate that this approach yields a compact low-power implementation of complete transceivers for high-performance wireless applications.
Placement and routing of RF embedded passive designs in LCP substrate
2007
Physical layout generation of RF embedded passive design is not an easy task since the response of a given layout is tightly coupled with the response of the individual components and the effect of interconnect parasitics. In this paper we propose a methodology for automatic layout generation of embedded passive RF circuits. We make use of circuit models to represent and optimize a given layout and use non-linear optimization at various stages of the methodology to obtain the desired goals. Full-wave EM simulations is completely out of the design loop, so our methodology significantly reduces the design time for RF embedded passive circuits. The proposed approach has been used successfully to generate layout for band-pass filters of varying sizes.