Impact of negative bias temperature instability on digital circuit reliability (original) (raw)

Two-Stage Degradation of p-Channel Poly-Si Thin-Film Transistors Under Dynamic Negative Bias Temperature Stress

Mingxiang Wang

IEEE Transactions on Electron Devices, 2000

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Negative Bias Temperature Instability Dominated Degradation of Metal-Induced Laterally Crystallized p-Type Polycrystalline Silicon Thin-Film Transistors

Mingxiang Wang

IEEE Transactions on Electron Devices, 2000

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A Two-Stage Degradation Model of p-Channel Low-Temperature Poly-Si Thin-Film Transistors Under Positive Bias Temperature Stress

Mingxiang Wang

IEEE Transactions on Electron Devices, 2000

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Gate-induced drain leakage current characteristics of p-type polycrystalline silicon thin film transistors aged by off-state stress

Myunghun Shin

Solid-State Electronics, 2018

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Analysis of Degradation Mechanisms in Low-Temperature Polycrystalline Silicon Thin-Film Transistors under Dynamic Drain Stress

Mingxiang Wang

IEEE Transactions on Electron Devices, 2000

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Dimensional effects on the reliability of polycrystalline silicon thin-film transistors

博盛 施

Microelectronics Reliability, 2000

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Degradation of Amorphous Silicon Thin Film Transistors Under Negative Gate Bias Stress

Mingxiang Wang

IEEE Transactions on Electron Devices, 2000

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Degradation of Metal-Induced Laterally Crystallized n-Type Polycrystalline Silicon Thin-Film Transistors Under Synchronized Voltage Stress

Mingxiang Wang

IEEE Transactions on Electron Devices, 2000

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Analysis of self-heating related instability in n-channel polysilicon thin film transistors fabricated on polyimide

Antonio Valletta

Thin Solid Films, 2009

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Leakage current variation during two different modes of electrical stressing in undoped hydrogenated n-channel polysilicon thin film transistors (TFTs)

Jean Brini

Microelectronics Reliability, 1999

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Study of the stability of polycrystalline silicon by means of the behavior of thin film transistors under gate bias stress

A. Rahal

Journal of Non-Crystalline Solids, 2002

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Implications of Negative Bias Temperature Instability in Power MOS Transistors

Ivica Manic

Micro Electronic and Mechanical Systems, 2009

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Substrate current and Its correlation with degradation of poly-Si thin film transistors

Mingxiang Wang

2010 17th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits, 2010

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Mechanism of device degradation in n- and p-channel polysilicon TFTs by electrical stressing

Warren Jackson

IEEE Electron Device Letters, 1990

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Analysis of Self-Heating-Related Instability in Self-Aligned p-Channel Polycrystalline-Silicon Thin-Film Transistors

Antonio Valletta

IEEE Electron Device Letters, 2010

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Substrate current and degradation of n-channel polycrystalline silicon thin-film transistors

Nikolaos Georgoulas

Microelectronics Reliability, 2005

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Bias-stress-induced creation and removal of dangling-bond states in amorphous silicon thin-film transistors

William Milne

Applied Physics Letters, 1992

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Reliability of Highly Stable Amorphous-Silicon Thin-Film Transistors Under Low Gate-Field Stress—Part II: Optimization of Fabrication Conditions and Gate Voltage Dependence

Levent E Aygun

IEEE Transactions on Device and Materials Reliability, 2016

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Effects of Gate Stack Structural and Process Defectivity on High- k Dielectric Dependence of NBTI Reliability in 32 nm Technology Node PMOSFETs

Wan Hatta

The Scientific World Journal, 2014

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On the permanent component profiling of the negative bias temperature instability in p-MOSFET devices

Abdelmadjid Benabdelmoumene

Solid-State Electronics, 2015

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Stress Power Dependent Self-Heating Degradation of Metal-Induced Laterally Crystallized n-Type Polycrystalline Silicon Thin-Film Transistors

Mingxiang Wang

IEEE Transactions on Electron Devices, 2000

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Physical Mechanism and Gate Insulator Material Dependence of Generation and Recovery of Negative-Bias Temperature Instability in p-MOSFETs

Gaurav Gupta

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Negative-Bias Temperature Instability in Gate-All-Around Silicon Nanowire MOSFETs: Characteristic Modeling and the Impact on Circuit Aging

weo luo

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Degradation Behaviors of Metal-Induced Laterally Crystallized n-Type Polycrystalline Silicon Thin-Film Transistors Under DC Bias Stresses

Mingxiang Wang

IEEE Transactions on Electron Devices, 2000

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Circuit-Level Impact of aSi:H Thin-Film-Transistor Degradation Effects

Rahul Shringarpure

IEEE Transactions on Electron Devices, 2009

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Spatially and temporally resolving the degradation of n-channel poly-Si thin-film transistors under hot-carrier stressing

Kai Hsiang Chang

Journal of Applied Physics, 2007

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Kink Suppression and High Reliability of Asymmetric Dual Channel Poly-Si Thin Film Transistors for High Voltage Bias Stress

Myunghun Shin

IEICE Transactions on Electronics, 2019

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Gate-sided hydrogen release as the origin of "permanent" NBTI degradation: From single defects to lifetimes

Robert Kosik

2015

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Physical models for degradation effects in polysilicon thin-film transistors

mike hack

IEEE Transactions on Electron Devices, 1993

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Depth localization of positive charge trapped in silicon oxynitride field effect transistors after positive and negative gate bias temperature stress

Guido Groeseneken

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Stability of hydrogenated polymorphous silicon thin-film transistors under DC electrical stress

Julien Brochet

IET Circuits, Devices & Systems, 2012

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Recent Issues in Negative-Bias Temperature Instability: Initial Degradation, Field Dependence of Interface Trap Generation, Hole Trapping Effects, and Relaxation

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IEEE Transactions on Electron Devices, 2007

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