Performance Study of Multicarrier PWM based Multi-Level Inverter with Reduced Components (original) (raw)

Harmonic Optimization and Output Enhancement in Cascaded Multi-Level Inverter by Considering Multicarrier PWM Technique

International Journal of Science and Research (IJSR)

This paper presents different types of modulation techniques for cascaded MLI to reduce harmonics presence in output voltage of the inverter. The paper starts by generating multilevel inverter reference waveforms that are sinusoidal and triangular in nature. In this paper, different multicarrier PWM techniques have been used and at load side a low pass filter is also introduced to get less harmonic contents. This paper includes APOD technique along with SPWM and modified-SPWM technique.In this I'm proposing a new technique Modified PODPWM which gives less THD than PODPWM and magnitude is also more than that of PODPWM for keeping MI same. The all strategies have been confirmed by MATLAB simulation using a cascaded five-level inverter with different type of loads.

A Review Paper on Comparative Study of Different Level Shifted Multicarrier PWM Techniques Implemented on a 15 Level Asymmetric H-Bridge Multilevel Inverter

2019

For medium voltage and high-power application generally, multilevel inverter is used as an<br> energy conversion device. Advantages of multilevel inverter are lower switching losses, total<br> harmonic distortion, less voltage stress on switches than conventional inverter. This review<br> paper presents a comparative study of performance parameters when different level shifted<br> multicarrier Pulse Width Modulation (PWM) techniques are implemented on a 15-level<br> asymmetric H-bridge multilevel inverter using a topology having less number of switches<br> with different loading conditions. Three modulation techniques have been used here. The<br> techniques used are PD-PWM, POD-PWM, and APOD-PWM. Here R, R-L and IM loads are<br> used. The operation is simulated in MATLAB SIMULINK. The FFT analysis of the three<br> modulation techniques used has been done when implemented on different loads and their<br> respective THD data ...

Multicarrier PWM Strategies for Hybrid Symmetrical Multilevel Inverter with Reduced Switch Count

International Journal of Engineering and Advanced Technology

Multilevel inverters are widely used for high power and high voltage applications. The performance of multilevel inverters are superior to conventional two level inverters in terms of reduced total harmonic distortion, higher dc link voltages, lower electromagnetic interference and increased quality in the output voltage waveform. This paper presents a single phase hybrid eleven level multilevel inverter topology with reduced switch count to compensate the above mentioned disadvantages. This paper also presents various high switching frequency based multi carrier pulse width modulation strategies such as Phase Disposition PWM Strategy (PDPWM), Phase Opposition and Disposition PWM Strategy (PODPWM), Alternate Phase opposition Disposition PWM (APODPWM), Carrier Overlapping PWM (COPWM), Variable frequency carrier PWM (VFPWM), Third Harmonic Injection PWM (TFIPWM) applied to the proposed eleven level multilevel inverter and is analyzed for RL load. FFT analysis is carried out and total ...

PERFORMANCE ANALYSIS OF MULTI-LEVEL INVERTER USING NON-IDENTICAL CARRIERS-BASED PULSE WIDTH MODULATION TECHNIQUES

IAEME PUBLICATION, 2021

In this paper, new types of pulse width modulation techniques are proposed to improve the performance of multi-level inverter. The effort is taken for this performance improvement without making any changes in the material of the multi-level inverter. Multi-level inverter performance depends on pulse width modulation technique adopted in it. The proposed techniques have the characteristics of exhibiting less total harmonic distortion. The output voltage is also improved. In this paper, these proposed techniques are applied to multi-level inverter and the performances are evaluated. It is simulated in MATLAB/Simulink and the results are obtained. The results are compared with the conventional method to look into its validity.

Design and Analysis of Multilevel Inverter with Reduced Number of Switches using Multicarrier SPWM Techniques

— Multi-level inverter has been widely accepted for high voltage applications. Their performance is highly superior to that of conventional two level inverter due to reduced harmonic distortion, lower electromagnetic interference and higher dc link voltages. Multi-level inverter (MLI) has some disadvantages such as increased number of components, complex pulse width modulation control method, and voltage-balancing problem. In order to increase the level of the output, the numbers of switches are increased and losses and complexity also increased. Hence to reduce these losses and complexity, a new topology is designed in this project i.e. Multi-level inverter (MLI) with reduced number of switches. A new inverter topology has been proposed which has superior features over conventional topologies in terms of the required power switches and isolated dc supplies, control requirements and reliability. In the mentioned topology, the switching operation is separated into high-and low-frequency parts. Design and simulation analysis of new 7 level inverter topology with multicarrier spwm techniques is presented in this project thesis using MATLAB/SIMULINK

Design Level Shifted Multicarrier Techniques for Cascaded H-Bridge Sub-Multilevel Inverter

Journal of ICT, Design, Engineering and Technological Science, 2020

The key aim of this paper is to implement and analyze level-shifted multicarrier techniques in Cascaded H Bridge (CHB)-Sub multi-level inverter to produce multiple level output voltage. The multi-level inverter is to synthesize a near sinusoidal voltage from several levels of dc voltages. The asymmetrical DC voltage sources are used for CHB Sub-Multilevel inverter, and the 15-level output voltage is obtained. The asymmetrical DC voltage Sources 12V, 24V, and 48V are used to get the 15 Level output voltage. The multicarrier Pulse Width Modulation (PWM) is used to get the desired voltage at the output. The Level Shifted Phase Disposition (LSPD) and Level Shifted Phase Opposition Disposition (LS-POD) multicarrier PWM techniques are used to reduce the Total Harmonic Distortion (THD) in the output voltage. The circuit is developed and analyzed in MATLAB software. The THD, measured by using the FFT tool of MATLAB software From the simulated results, the level-shifted phase opposition disposition multicarrier PWM has better performance than level-shifted phase disposition multicarrier PWM technique because it contains fewer harmonics so to improve the system reliability and quality. The performance analysis and mitigation of harmonics can enhance the power quality of the supply voltage delivered to the customers. However, power quality occurs several problems such as voltage sag, swell, under-voltage, overvoltage, transients, etc.

A Multicarrier PWM Technique for Five Level Inverter Connected to the Grid

International Journal of Power Electronics and Drive System (IJPEDS), 2018

In this paper, a three-phase multilevel cascaded H-bridge inverter is developed for injecting renewable power energy into the grid through a filter. The main contribution of this work is to reduce the total harmonic distortion (THD) by using a passive filter and to enhance the output voltages by adopting a multicarrier pulse width modulation (MCPWM). The simulation results affirm a good performance of the proposed multicarrier PWM control using a three-phase five-level inverter. The proposed inverter is tested as well as the THD and the spectral analysis of the output voltage are calculated using Simulink/Matlab software.

Modified multicarrier sinusoidal pulse-width modulation for three-phase open-load five-level inverte

Bulletin of Electrical Engineering and Informatics, 2024

Five-level voltage source inverter (VSI) is a power inverter topology generating a five-level output voltage waveform. This inverter topology can reduce harmonics distortion to be lower compared to a conventional twolevel inverter. In practical, delay of gating signals is unavoidable during switching operation of power semiconductor switches. Adding dead time in the gating signals of VSI’s power switches is mandatory to avoid short circuit during switching operation. However, the dead time of the inverter’s switching signals causes low frequency harmonics and distortion of inverter’s output waveforms. In this paper, a different multicarrier sinusoidal pulse-width modulation (SPWM) method with harmonics suppression capability was proposed and applied in the three-phase open-connection load five-level inverter. The proposed modified SPWM was tested using computer simulation of Powersim (PSIM) software. The measured output waveforms of the five-level VSI at different power factor conditions are presented and analyzed. The total harmonics distortion (THD) values of inverter’s output current were suppressed using the proposed SPWM method to be less than 1%. The test results showed that the proposed modified SPWM method was able to reduce the distortion (THD) of alternating current (AC) waveform, and increase the quality of the inverter’s output power.

Design of 15 level reduced switches inverter topology using multicarrier sinusoidal pulse width modulation

TELKOMNIKA, 2023

In this proposed paper, multicarrier sinusoidal pulse width modulation (M-SPWM) method is implemented for design of 15 level reduced switches inverter topology. This inverter topology generates 15 level output-voltage with suitablelswitching pulse production using M-SPWM and altered level of voltages are attained with distinction of modulationlindex. The split inductor is used to diminish the harmoniclcontent and flatted output current. This type of system which contains different range of different range of voltage supplies. As a result, this inverter reduces the difficulty in gating time calculation and there is no neutral point fluctuation issue. This paper illuminates the modes of switching and minimization of stress in voltage and harmonic diminution are examined. The grades of the projected multilevel inverter (MLI) system are verified using Matlab/Simulink and dsPIC controller respectively.

A level shift carrier based SPWM for reduced switch 5-level multilevel inverter topology

International Journal of Power Electronics and Drive Systems (IJPEDS), 2024

Multilevel inverters (MLI) seek attention from many researchers these days for high/medium power industrial applications because their output power quality is better than 2-level inverters. This research work presents a detailed comparative analysis of multicarrier level shift (LSPWM) technique implemented on five level conventional and modified multilevel inverters in MATLAB/Simulink software. With the aim of decreasing number of gate drives, switching devices, and DC sources there is a greater focus on emerging multilevel topologies, even though majority of traditional topologies are employed in important application. MLIs have bright future in industry-focused applications, but their size, cost, device count, and switching complexity have hindered their commercial acceptance. Researchers are always creating next generation topologies, or reducing the components and switches used in (RSC) MLIs, to illustrate the shortcomings of MLIs. Conventional five level inverter uses eight semiconductor switches, eight driver circuit and suffers from switching complexity while the proposed symmetrical 5-level smart MLI topology offers reduced quantity of switching elements, gate driver circuits, low cost, space requirement, low dv/dt stress, low switching losses over the traditional topology. The effect of % output harmonic contents are analyzed with phase-disposition and phase-opposition disposition technique for different loads.