IMAGE WAFER INSPECTION BASED ON TEMPLATE MATCHING (original) (raw)
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This paper is an extension of our previous work on the image segmentation of electronic structures on patterned wafers to improve the defect detection process on optical inspection tools. Die-to-die wafer inspection is based upon the comparison of the same area on two neighborhood dies. The dissimilarities between the images are a result of defects in this area of one of the die. The noise level can vary from one structure to the other, within the same image. Therefore, segmentation is needed to create a mask and apply an optimal threshold in each region. Contrast variation on the texture can affect the response of the parameters used for the segmentation. This paper shows a method to anticipate these variations with a limited number of training samples, and modify the classifier accordingly to improve the segmentation results.
Content based segmentation of patterned wafers
Journal of Electronic Imaging, 2004
We extend our previous work on the image segmentation of electronic structures on patterned wafers to improve the defect detection process on optical inspection tools. Die-to-die wafer inspection is based on the comparison of the same area on two neighboring dies. The dissimilarities between the images are a result of defects in this area of one of the dies. The noise level can vary from one structure to the other, within the same image. Therefore, segmentation is required to create a mask and apply an optimal threshold in each region. Contrast variation on the texture can affect the response of the parameters used for the segmentation. We show a method to anticipate these variations with a limited number of training samples, and modify the classifier accordingly to improve the segmentation results.
Photomask Technology 2015, 2015
Even small defects on the main patterns can create killer defects on the wafer, whereas the same defect on or near the decorative patterns may be completely benign to the wafer functionality. This ambiguity often causes operators and engineers to put a mask "on hold" to be analyzed by an AIMS™ tool which slows the manufacturing time and increases mask cost. In order to streamline the process, mask shops need a reliable way to quickly identify the wafer impact of defects during mask inspection review reducing the number of defects requiring AIMS™ analysis. Source Mask Optimization (SMO) techniques are now common on sub 20nm node critical reticle patterns These techniques create complex reticle patterns which often makes it difficult for inspection tool operators to identify the desired wafer pattern from the surrounding nonprinting patterns in advanced masks such as SMO, Inverse Lithography Technology(ILT), Negative Tone Development (NTD). In this study, we have tested a system that generates aerial simulation images directly from the inspection tool images. The resulting defect dispositions from a program defect test mask along with numerous production mask defects have been compared to the dispositions attained from AIMS™ analysis. The results of our comparisons are presented, as well as the impact to mask shop productivity.
Automated vision system for inspection of IC pads and bonds
IEEE Transactions on Components, Hybrids, and Manufacturing Technology, 1993
One of the problems in increasing reliability in the manufacture of integrated circuit devices is inspection of the bond pads and the bonds connecting the bond pads to the lead fingers of the device. The continuing increase in packing density of VLSI circuits requires that the inspection process be completely automated. Here, we present methods for visual inspection of bond pads and bonds, which are intended to automatically extract parameters of significance in determining their quality, from two-dimensional images taken from the top of the IC wafer. 01484411/93$03.00 0 1993 IEEE
High Accuracy Swin Transformers for Imagebased Wafer Map Defect Detection
MECS Press, 2022
A wafer map depicts the location of each die on the wafer and indicates whether it is a Product, Secondary Silicon, or Reject. Detecting defects in Wafer Maps is crucial in order to ensure the integrity of the chips processed in the wafer, as any defect can cause anomalies thus decreasing the overall yield. With the current advances in anomaly detection using various Computer Vision Techniques, Transformer Architecture based Vision models are a prime candidate for identifying wafer defects. In this paper, the performance of Four such Transformer based models-BEiT (BERT Pre-Training of Image Transformers), FNet (Fourier Network), ViT (Vision Transformer) and Swin Transformer (Shifted Window based Transformer) in wafer map defect classification are discussed. Each of these models were individually trained, tested and evaluated with the "MixedWM38" dataset obtained from the online platform, Kaggle. During evaluation, it has been observed that the overall accuracy of the Swin Transformer Network algorithm is the highest, at 97.47%, followed closely by Vision Transformer at 96.77%. The average Recall of Swin Transformer is also 97.54%, which indicates an extremely low encounter of false negatives (24600 ppm) in contrast to true positives, making it less likely to expose defective products in the market.
Similarity Searching for Defective Wafer Bin Maps in Semiconductor Manufacturing
IEEE Transactions on Automation Science and Engineering, 2000
Note to Practitioners-Semiconductor manufacturing in complicated nanotechnology is facing tough challenge for quick response to yield excursion for shortening time to market and reducing the cost to maintain competitive advantages. Due to the increasing complexity of nanotechnology for wafer fabrication, increasingly high inspection costs and yield loss associated with defective wafers have become a critical concern of semiconductor manufacturers. Focused on real settings of practical industrial experiments, this study provides a novel approach to searching similar WBMs from huge wafer spatial data to quickly identify potential causes for yield enhancement. This approach was validated in real setting in Taiwan and the results showed its practical viability.
Automated Inspection System for Assembled Printed Circuit Board Using Machine Vision
Soft Computing Research Society eBooks, 2023
The perfect Printed Circuit Board (PCB) plays a very important role in every electronic device as well as in automation systems. So, it is very important to find defects in the PCB before installing it to any system or any device. However, PCB Manufacturers use various inspection systems in the process of manufacturing PCBs for detecting various types of defects in the PCB. In this article, we present the Automated assembled PCB Inspection System. This system finds defects such as missing components and improper position of its components by using the Pattern matching Technique where a good known score of template image is matched with the score of the test image. This system gives results at each inspection within 10 Seconds and the result given by this system are passed or fail in the form of an array sheet. This automated inspection system is created by using NI Vision Builder AI and NI LabVIEW technology. Ni Vision Builder AI has been used to create the algorithm. And NI LabVIEW has been used to create the application.
Detection and classification of defect patterns on semiconductor wafers
IIE Transactions, 2006
The detection of process problems and parameter drift at an early stage is crucial to successful semiconductor manufacture. The defect patterns on the wafer can act as an important source of information for quality engineers allowing them to isolate production problems. Traditionally, defect recognition is performed by quality engineers using a scanning electron microscope. This manual approach is not only expensive and time consuming but also it leads to high misidentification levels. In this paper, an automatic approach consisting of a spatial filter, a classification module and an estimation module is proposed to validate both real and simulated data. Experimental results show that three types of typical defect patterns: (i) a linear scratch; (ii) a circular ring; and (iii) an elliptical zone can be successfully extracted and classified. A Gaussian EM algorithm is used to estimate the elliptic and linear patterns, and a sphericalshell algorithm is used to estimate ring patterns. Furthermore, both convex and nonconvex defect patterns can be simultaneously recognized via a hybrid clustering method. The proposed method has the potential to be applied to other industries.
IJERT-IC Label Inspection Sub-System Design For Product Quality Conformation Based Template Matching
International Journal of Engineering Research and Technology (IJERT), 2013
https://www.ijert.org/ic-label-inspection-sub-system-design-for-product-quality-conformation-based-template-matching https://www.ijert.org/research/ic-label-inspection-sub-system-design-for-product-quality-conformation-based-template-matching-IJERTV2IS1376.pdf This paper represents architectural design for an industrial inspection subsystem for product quality conformity ,IC label inspection,that combines the image processing and pattern recognition algorithms (template matching) with the embedded firmware design for the actuation system.Template matching based normalized cross correlation is the algorithm of choice for this paper,this is due to its higher accuracy and shorter computational time of the image processing library used,The implementation of the algorithm is done on visual basic (VB 6.0)SDK,after several algorithm tests done on MATLAB.Having developed an application on VB environment,makes the architecture more comfortable for real time application.