Hierarchical extreme-voltage stress test of analog CMOS ICs for gate-oxide reliability enhancement (original) (raw)

Proceedins of the 14th ACM Great Lakes symposium on VLSI - GLSVLSI '04, 2004

Abstract

Yield and reliability are two factors affecting the profitability of semiconductor manufacturing. High-temperature burn-in and extreme-voltage stress tests are two current industrial standard methods to speed up the deterioration of electronic devices and weed-out infant mortality. Extreme-voltage stress test aims at enhancing both quality and reliability without performance the high-cost burn-in test process. Our recent stress tests of analog/mixed-signal CMOS

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