Carbon Nanotube Field-Effect Transistors and Logic (original) (raw)
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Carbon nanotube field-effect transistors and logic circuits
Proceedings 2002 Design Automation Conference (IEEE Cat. No.02CH37324), 2002
In this paper, we present recent advances in the understanding of the properties of semiconducting single wall carbon nanotube and in the exploration of their use as field-effect transistors (FETs). Both electrons and holes can be injected in a nanotube transistor by either controlling the metal-nanotube Schottky barriers present at the contacts or simply by doping the bulk of the nanotube. These methods give complementary nanotube FETs that can be integrated together to make inter-and intra-nanotube logic circuits. The device performance and their general characteristics suggest that they can compete with silicon MOSFETs. While this is true when considering simple prototype devices, several issues remain to be explored before a nanotube-based technology is possible. They are also discussed.
Carbon nanotube transistors and logic circuits
Physica B: Condensed Matter, 2002
In this paper, we present recent advances in the understanding of the properties of semiconducting single wall carbon nanotube and in the exploration of their use as field-effect transistors (FETs). Both electrons and holes can be injected in a nanotube transistor by either controlling the metal-nanotube Schottky barriers present at the contacts or simply by doping the bulk of the nanotube. These methods give complementary nanotube FETs that can be integrated together to make inter-and intra-nanotube logic circuits. The device performance and their general characteristics suggest that they can compete with silicon MOSFETs. While this is true when considering simple prototype devices, several issues remain to be explored before a nanotube-based technology is possible. They are also discussed.
IEEE Transactions on Nanotechnology, 2002
Presents experimental results on single-wall carbon nanotube field-effect transistors (CNFETs) operating at gate and drain voltages below 1V. Taking into account the extremely small diameter of the semiconducting tubes used as active components, electrical characteristics are comparable with state-of-the-art metal oxide semiconductor field-effect transistors (MOSFETs). While output as well as subthreshold characteristics resemble those of conventional MOSFETs, we find that CNFET operation is actually controlled by Schottky barriers (SBs) in the source and drain region instead of by the nanotube itself. Due to the small size of the contact region between the electrode and the nanotube, these barriers can be extremely thin, enabling good performance of SB-CNFETs.
Single- and multi-wall carbon nanotube field-effect transistors
Applied Physics Letters, 1998
We fabricated field-effect transistors based on individual single-and multi-wall carbon nanotubes and analyzed their performance. Transport through the nanotubes is dominated by holes and, at room temperature, it appears to be diffusive rather than ballistic. By varying the gate voltage, we successfully modulated the conductance of a single-wall device by more than 5 orders of magnitude. Multi-wall nanotubes show typically no gate effect, but structural deformations-in our case a collapsed tube-can make them operate as field-effect transistors. © 1998 American Institute of Physics. ͓S0003-6951͑98͒00143-0͔
CARBON NANOTUBE FIELD-EFFECT TRANSISTORS
International Journal of High Speed Electronics and Systems, 2006
This paper discusses the device physics of carbon nanotube field-effect transistors (CNTFETs). After reviewing the status of device technology, we use results of our numerical simulations to discuss the physics of CNTFETs emphasizing the similarities and differences with traditional FETs. The discussion shows that our understanding of CNTFET device physics has matured to the point where experiments can be explained and device designs optimized. The paper concludes with some thoughts on challenges and opportunities for CNTFET electronics.
The Role of Metal-Nanotube Contact in the Performance of Carbon Nanotube Field-Effect Transistors
Nano Letters, 2005
Here we present the first statistical analysis of this issue. We show that a large data set of more than 100 devices can be consistently accounted by a model that relates the on-current of a CNFET to a tunneling barrier whose height is determined by the nanotube diameter and the nature of the source/drain metal contacts. Our study permits identification of the desired combination of tube diameter and type of metal that provides the optimum performance of a CNFET.
Overview of Carbon Nanotube Field-Effect Transistors
2013
An overview of the different types of CNTFET which have large potential to semiconductor industry and microelectronic systems is presented. The present paper is focused on the structure of the various types of CNTFET and their technology characteristics depending on the specific CNT used: single-walled or
Novel Structures for Carbon Nanotube Field Effect Transistors
International Journal of Modern Physics B, 2009
A carbon nanotube field effect transistor (CNTFET) has been studied based on the Schrödinger–Poisson formalism. To improve the saturation range in the output characteristics, new structures for CNTFETs are proposed. These structures are simulated and compared with the conventional structure. Simulations show that these structures have a wider output saturation range. With this, larger drain-source voltage (Vds) can be used, which results in higher output power. In the digital circuits, higher Vds increases noise immunity.
ACS Nano, 2012
The use of carbon nanotube (CNT)-based field-effect transistors (FETs) as pass transistors is investigated. Logic gates are designed and constructed with these CNT FETs in the passtransistor logic (PTL) style. Because two of the three terminals of every CNT FET are used as inputs, the efficiency per transistor in PTL circuits is significantly improved. With the PTL style, a single pair of FETS, one n-type and one p-type, is sufficient to construct high-performance AND or OR gates in which the measured output voltages are consistent with those quantitatively derived using the characteristics of the pair of the constituent n-and p-FETs. A one-bit full subtractor, which requires a total of 28 FETs to construct in the usual CMOS circuit, is realized on individual CNTs for the first time using the PTL style with only three pairs of n-and p-FETs.
Optimization of Single-Gate Carbon-Nanotube Field-Effect Transistors
IEEE Transactions On Nanotechnology, 2005
The performance of Schottky-barrier carbon-nanotube field-effect transistors (CNTFETs) critically depends on the device geometry. Asymmetric gate contacts, the drain and source contact thickness, and inhomogenous dielectrics above and below the nanotube influence the device operation. An optimizer has been used to extract geometries with steep subthreshold slope and high on o ratio. It is found that the best performance improvements can be achieved using asymmetric gates centered above the source contact, where the optimum position and length of the gate contact varies with the oxide thickness. The main advantages of geometries with asymmetric gate contacts are the increased on o ratio and the fact that the gate voltage required to attain minimum drain current is shifted toward zero, whereas symmetric geometries require = 2. Our results suggest that the subthreshold slope of single-gate CNTFETs scales linearly with the gate-oxide thickness and can be reduced by a factor of two reaching a value below 100 mV/dec for devices with oxide thicknesses smaller than 5 nm by geometry optimization.