Optimization of Bank Switching Instructions in Embedded Systems through Static Analysis of Machine Codes (original) (raw)
2009, 2009 IEEE International Advance Computing Conference
This paper describes a static machine code compilers do not guarantee the optimal placement of bank analyzer which helps to eliminate the redundant bank selection instructions [1]. Advanced compilers are switching instructions in partitioned memory architectures. utilizing algorithms for optimization technique to Our approach rests on a state transition diagram minimize the overhead of bank switching. Generating representing the memory bank switching corresponding to efficient memory access code for bank switched each bank selection instruction. Redundant data memory architectures is still a challenging research problem. bank selection instructions in the intraprocedural sequence, loops and interprocedural routines in the application program are eliminated. Analysis is done at machine code Program development phase can be made efficient with levels, so no software or runtime overhead. This results in the help of automated debugging, code validation and reduced code size as well as increased execution speed. No optimization methods utilizing the vast power of machines assertion or annotated assembly code is needed. This available today. The two main approaches for the method scales well into large number of memory blocks as detection of malice are static analysis and ynoamic well as other architectures, once appropriate information is analysis. Static analysis examines the code of programs to available. A prototype based on PIC 16F87X determine properties of the dynamic execution of these microcontrollers is described. A detailed algorithm is programs without running them. This technique has been prescribed in this paper.
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