Hadron collider triggers with high-quality tracking at very high event rates (original) (raw)
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Hadron collider triggers with offline-quality tracking at very high event rates
13th IEEE-NPSS Real Time Conference, 2003
We propose precise and fast-track reconstruction at hadron collider experiments, for use in online trigger decisions. We describe the features of fast-track (FTK), a highly parallel processor dedicated to the efficient execution of a fast-tracking algorithm. The hardware-dedicated structure optimizes speed and size; these parameters are evaluated for the ATLAS experiment. We discuss some applications of high-quality tracks available to the trigger logic at an early stage, by using the LHC environment as a benchmark. The most interesting application is online selection of b-quarks down to very low transverse momentum, providing interesting hadronic samples: examples are , potentially useful for jet calibration, and multi-b final states for supersymmetric Higgs searches. The paper is generated from outside the ATLAS experiment and has not been discussed by the ATLAS collaboration.
As the LHC luminosity is ramped up to 3× × × ×10 34 cm −2 s −1 and beyond, the high rates, multiplicities, and energies of particles seen by the detectors will pose a unique challenge. Only a tiny fraction of the produced collisions can be stored on tape and immense real-time data reduction is needed. An effective trigger system must maintain high trigger efficiencies for the physics we are most interested in, and at the same time suppress the enormous QCD backgrounds. This requires massive computing power to minimize the online execution time of complex algorithms. A multi-level trigger is an effective solution for an otherwise impossible problem. The Fast Tracker (FTK) is a proposed upgrade to the current ATLAS trigger system that
A fast hardware tracker for the ATLAS trigger system
2012
Selecting interesting events online is a very challenging task in LHC experiments. By the end of 2014, the LHC will run with an energy of 13 or 14 TeV and instantaneous luminosities which could exceed 10 34 interactions per cm 2 and per second. The triggering in the ATLAS detector is realized using a three level trigger approach, in which the first level is hardware based and the second and third stage are realized using large computing farms. It is a crucial and non-trivial task for triggering to maintain a high efficiency for events of interest while suppressing effectively the very high rates of inclusive QCD processes, which constitute mainly background. At the same time the trigger system has to be robust and provide sufficient operational margins to adapt to changes in the running environment. In the current design track reconstruction can be performed only in limited regions of interest at second stage trigger and the CPU requirements may limit this even further at the highest instantaneous luminosities. Providing high quality track reconstruction over the entire detector volume for the second stage trigger decision would allow gains in efficiency and background rejection for triggers on tau leptons, b-hadrons and help reduce the luminosity dependence of isolation requirements for electrons and muons. The Fast Track Trigger (FTK) is an ongoing upgrade project aimed at providing track reconstruction using the silicon microstrip and pixel detectors. Pattern recognition and track fitting are executed in a hardware system utilizing massive parallel processing and achieve a tracking performance close to that of the global track reconstruction. The FTK systems design, based on a mixture of advanced technologies and expected physics performance will be presented.
FTK: A Fast Track Trigger for ATLAS
2012
We describe the design and expected performance of a the Fast Tracker Trigger (FTK) system for the ATLAS detector at the Large Hadron Collider. The FTK is a highly parallel hardware system designed to operate at the Level 1 trigger output rate. It is designed to provide global tracks reconstructed in the inner detector with resolution comparable to the full offline reconstruction as input of the Level 2 trigger processing. The hardware system is based on associative memories for pattern recognition and fast FPGAs for track reconstruction. The FTK is expected to dramatically improve the performance of track based isolation and b-tagging with little to no dependencies of pile-up interactions.
On-line tracking processors at hadron colliders: The SVT experience at CDF II and beyond
Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment, 2007
The Silicon Vertex Trigger (SVT) provides the CDF experiment with a powerful tool for fast and precise track finding and fitting at trigger level. The system enhances the experiment's reach on B-physics and large P T -physics coupled to b quarks. We review the main design features and the performance of the SVT with particular attention to the recent upgrade that improved its capabilities. Finally, we will focus on additional improvements of the functionality of such a system in a more general experimental context. r
IEEE Transactions on Nuclear Science, 2000
The ATLAS experiment at the Large Hadron Collider (LHC) will face the challenge of efficiently selecting interesting candidate events in pp collisions at 14 TeV center of mass energy, while rejecting the enormous number of background events, stemming from an interaction rate of up to 10 9 Hz. The First Level trigger will reduce this rate to around O(100 kHz). Subsequently, the High Level Trigger (HLT), which is comprised of the Second Level trigger and the Event Filter, will need to further reduce this rate by a factor of O(10 3 ). The HLT selection is software based and will be implemented on commercial CPUs, using a common framework built on the standard ATLAS object oriented software architecture. In this paper an overview of the current implementation of the selection for electrons and photons *
The Evolution of FTK, a Real-Time Tracker for Hadron Collider Experiments
Astroparticle, Particle and Space Physics, Detectors and Medical Physics Applications - Proceedings of the 11th Conference, 2010
We describe the architecture evolution of the highly-parallel dedicated processor FTK, which is driven by the simulation of LHC events at high luminosity (10 34 cm -2 s -1 ). FTK is able to provide precise on-line track reconstruction for future hadronic collider experiments. The processor, organized in a two-tiered pipelined architecture, execute very fast algorithms based on the use of a large bank of pre-stored patterns of trajectory points (first tier) in combination with full resolution track fitting to refine pattern recognition and to determine off-line quality track parameters. We describe here how the high luminosity simulation results have produced a new organization of the hardware inside the FTK processor core. *