Electron mobility characteristics of n-channel metal-oxide-semiconductor field-effect transistors fabricated on Ge-rich single- and dual-channel SiGe heterostructures (original) (raw)
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Applied Physics Letters, 2003
By growing heterostructures that combine a surface strained Si layer with a buried strained Ge layer on Si 0.5 Ge 0.5 , we have fabricated metal-oxide-semiconductor field-effect transistors with mobility enhancement factors over bulk Si of 1.7-1.9 for electrons and 10-12 for holes. While high hole mobility can be attained in strained Si/strained Ge heterostructures grown on Si 0.3 Ge 0.7 , we have found the electron mobility in similarly grown heterostructures to be limited by defect scattering in the Si cap. Reducing the Ge content of the virtual substrate to Si 0.5 Ge 0.5 and optimizing the strained Si and strained Ge layer thicknesses allowed the realization of devices where the p-channel mobility as a function of inversion density actually matches or exceeds the n-channel mobility.
High hole and electron mobilities using Strained Si/Strained Ge heterostructures
2004
PMOS and NMOS mobility characteristics of the dual channel (strained Si/strained Ge) heterostructure have been reviewed. It is shown that the dual channel heterostructure can provide substantially enhanced mobilities for both electrons and holes. However, germanium interdiffusion from the germanium rich buried layer into the underlying buffer layer could potentially reduce the hole mobility enhancements.
Journal of Applied Physics, 2003
Although strained-silicon ͑⑀-Si͒ p-type metal-oxide-semiconductor field-effect transistors ͑p-MOSFETs͒ demonstrate enhanced hole mobility compared to bulk Si devices, the enhancement has widely been observed to degrade at large vertical effective fields. We conjecture that the hole wave function in ⑀-Si heterostructures spreads out over distances of ϳ10 nm, even at large inversion densities, due to the strain-induced reduction of the out-of-plane effective mass. Relevant experimental and theoretical studies supporting this argument are presented. We further hypothesize that by growing layers thinner than the hole wave function itself, inversion carriers can be forced to occupy and hybridize the valence bands of different materials. In this article, we show that p-MOSFETs with thin ͑i.e., Ͻ3 nm͒ ⑀-Si layers grown on Ge-rich Si 1Ϫx Ge x buffers exhibit markedly different mobility enhancements from prior ⑀-Si p-MOSFETs. Devices fabricated on a thin ⑀-Si layer grown on relaxed Si 0.3 Ge 0.7 demonstrate hole mobility enhancements that increase with gate overdrive, peaking at a value of nearly 3 times. In other devices where the channel region consists of a periodic ⑀-Si/relaxed Si 0.3 Ge 0.7 digital alloy, a nearly constant mobility enhancement of 2.0 was observed over inversion densities ranging from 3 to 14ϫ10 12 /cm 2 .
Journal of Applied Physics, 2005
This article reviews the history and current progress in high-mobility strained Si, SiGe, and Ge channel metal-oxide-semiconductor field-effect transistors (MOSFETs). We start by providing a chronological overview of important milestones and discoveries that have allowed heterostructures grown on Si substrates to transition from purely academic research in the 1980's and 1990's to the commercial development that is taking place today. We next provide a topical review of the various types of strain-engineered MOSFETs that can be integrated onto relaxed Si 1−x Ge x , including surface-channel strained Si n-and p-MOSFETs, as well as double-heterostructure MOSFETs which combine a strained Si surface channel with a Ge-rich buried channel. In all cases, we will focus on the connections between layer structure, band structure, and MOS mobility characteristics. Although the surface and starting substrate are composed of pure Si, the use of strained Si still creates new challenges, and we shall also review the literature on short-channel device performance and process integration of strained Si. The review concludes with a global summary of the mobility enhancements available in the SiGe materials system and a discussion of implications for future technology generations.
IEEE Electron Device Letters, 2000
High-hole and electron mobility in complementary channels in strained silicon (Si) on top of strained Si 0 4 Ge 0 6 , both grown on a relaxed Si 0 7 Ge 0 3 virtual substrate is shown for the first time. The buried Si 0 4 Ge 0 6 serves as a high-mobility p-channel, and the strained-Si cap serves as a high-mobility n-channel. The effective mobility, measured in devices with a 20m gate length and 3.8-nm gate oxide, shows about 2.2 2.5 and 2.0 times enhancement in hole and electron mobility, respectively, across a wide vertical field range. In addition, it is found that as the Si cap thickness decreased, PMOS transistors exhibited increased mobility especially at medium-and high-hole density in this heterostructure.
Applied Physics Letters, 2005
A dual channel heterostructure consisting of strained-Si/ strained-Si 1−y Ge y on a relaxed Si 1−x Ge x buffer ͑y Ͼ x͒, provides a platform for fabricating metal-oxide-semiconductor field-effect transistors with high hole mobilities. Ge outdiffusion during high temperature processing steps from the strained-Si 1−y Ge y layer into the relaxed Si 1−x Ge x buffer reduces the hole mobilities in these heterostructures. We present a strained-Si/ strained-Si 1−y Ge y / strained-Si heterostructure on relaxed Si 1−x Ge x , in which the strained-Si layer between the strained-Si 1−y Ge y and relaxed Si 1−x Ge x reduces Ge outdiffusion. Improved hole mobilities in this heterostructure are also observed over similar dual channel heterostructures which could be a result of better hole confinement in the strained-Si 1−y Ge y layer of the proposed heterostructure.
Hole mobility enhancement and Si cap optimization in nanoscale strained Si 1− x Ge x PMOSFETs
Solid-state Electronics, 2004
P-channel metal-oxide-semiconductor field-effect-transistors (PMOSFETs) with a Si 1Àx Ge x /Si heterostructure channel were fabricated. Peak mobility enhancement of about 41% in Si 1Àx Ge x channel PMOSFETs was observed compared to Si channel PMOSFETs. Drive current enhancement of about 17% was achieved for 70 nm channel length ðL G Þ Si 0:9 Ge 0:1 PMOSFETs with SiO 2 gate dielectric. This shows the impact of increased hole mobility even for ultrasmall geometry of MOSFETs and modest Ge mole fractions. Comparable short channel effects were achieved for the buried channel Si 1Àx Ge x devices with L G ¼ 70 nm, by Si cap optimization, compared to the Si channel devices. Drive current enhancement without significant short channel effects (SCE) and leakage current degradation was observed in this work.
Semiconductor Science and Technology, 2004
Dual-channel heterostructures, with a tensile strained-Si layer (for electron channel) and a compressively strained-Si 0.4 Ge 0.6 layer (for hole channel) on relaxed-Si 0.7 Ge 0.3-on-insulator (SGOI) substrates were fabricated by bond, etch-back and epitaxial regrowth. Partially depleted p-MOSFETs were made on this strained-Si/strained-SiGe SGOI heterostructure. The hole mobility shows an enhancement of about 1.8 times at 0.2 MV cm −1 , equivalent to that obtained on co-processed strained-Si/strained-SiGe p-MOSFETs fabricated on bulk relaxed Si 0.7 Ge 0.3 virtual substrates. The limited thermal budget issue for this heterostructure is also discussed.