Ultrathin InAs nanowire growth by spontaneous Au nanoparticle spreading on indium-rich surfaces (original) (raw)
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Growth of vertical InAs nanowires on heterostructured substrates
Nanotechnology, 2009
We demonstrate the Au-assisted growth of semiconductor nanowires on different engineered substrates. Two relevant cases are investigated: GaAs/AlGaAs heterostructures capped by a 50 nmthick InAs layer grown by molecular beam epitaxy and a 2 µm-thick InAs buffer layer on Si(111) obtained by vapor phase epitaxy. Morphological and structural properties of substrates and nanowires are analyzed by atomic force and transmission electron microscopy. Our results indicate a promising direction for the integration of III-V nanostructures on Si-based electronics as well as for the development of novel micromechanical structures.
Understanding Self-Aligned Planar Growth of InAs Nanowires
Nano Letters, 2013
Semiconducting nanowires have attracted lots of attention because of their potential applications. Compared with free-standing nanowires, self-aligned planar nanowires grown epitaxially on the substrate have shown advantageous properties such as being twin defect free and ready for device fabrication, opening potentials for the large-scale device applications. Understanding of planar nanowire growth, which is essential for selective growth of planar vs freestanding wires, is still limited. In this paper, we reported different growth behaviors for self-aligned planar and free-standing InAs nanowires under identical growth conditions. We present a new model based on a revised Gibbs−Thomson equation for the planar nanowires. Using this model, we predicted and successfully confirmed through experiments that higher arsenic vapor partial pressure promoted free-standing InAs nanowire growth. A smaller critical diameter for planar nanowire growth was predicted and achieved experimentally. Successful control and understanding of planar and free-standing nanowire growth established in our work opens up the potential of large-scale integration of self-aligned nanowires for practical device applications.
On the growth of InAs nanowires by molecular beam epitaxy
Journal of Crystal Growth, 2011
The growth of InAs nanowires by molecular beam epitaxy only takes place in a narrow temperature range, independent of the method used to induce the growth: with (Au or Mn) or without metal catalysts. Our findings suggest that the physical chemistry of the intermetallic compound formed during the catalyzed growth of the NWs is not relevant for the induction of the growth. Moreover, the lattice structure of the wires always shows wurtzite sections. Our results indicate the need of a unified model for the metal-catalyzed and self-catalyzed growth of nanowires.
Experimental determination of adatom diffusion lengths for growth of InAs nanowires
Journal of Crystal Growth, 2013
Au-assisted InAs nanowires are grown using molecular beam epitaxy. By tailoring the growth and position of InAs nanowires, experimental values for the effective diffusion lengths of adatoms on both the substrate and nanowire sidewalls have been deduced. In the framework of a mass continuity growth model for group III elements, based on a simple kinetic but informative treatment without use of thermodynamic parameters, both shadowing effects and shared substrate diffusion areas are included. The growth model is fitted to two types of data, one for nanowires positioned in a quadratic array with varying pitch, and one for nanowires with axial heterostructures. For the given growth conditions the effective diffusion length for In adatoms on InAs NW sidewalls with wurtzite crystal structure is found to be 3 mm, whereas the effective diffusion of Ga adatoms is an order of magnitude smaller. The minimum pitch to ensure independent growth, without influence from nearby NWs, is found to be around 2 mm.
Controlled Synthesis of Phase-Pure InAs Nanowires on Si(111) by Diminishing the Diameter to 10 nm
Nano Letters, 2014
Here we report the growth of phase-pure InAs nanowires on Si (111) substrates by molecular-beam epitaxy using Ag catalysts. A conventional one-step catalyst annealing process is found to give rise to InAs nanowires with diameters ranging from 4.5 to 81 nm due to the varying sizes of the Ag droplets, which reveal strong diameter dependence of the crystal structure. In contrast, a novel two-step catalyst annealing procedure yields vertical growth of highly uniform InAs nanowires ∼10 nm in diameter. Significantly, these ultrathin nanowires exhibit a perfect wurtzite crystal structure, free of stacking faults and twin defects. Using these high-quality ultrathin InAs nanowires as the channel material of metal-oxide-semiconductor field-effect transistor, we have obtained a high I ON /I OFF ratio of ∼10 6 , which shows great potential for application in future nanodevices with low power dissipation.
Doubling the mobility of InAs/InGaAs selective area grown nanowires
Physical Review Materials, 2022
Selective area growth (SAG) of nanowires and networks promise a route toward scalable electronics, photonics and quantum devices based on III-V semiconductor materials. The potential of highmobility SAG nanowires however is not yet fully realized, since interfacial roughness, misfit dislocations at the nanowire/substrate interface and non-uniform composition due to material intermixing all scatter electrons. Here, we explore SAG of highly lattice-mismatched InAs nanowires on insulating GaAs(001) substrates and address these key challenges. Atomically smooth nanowire/substrate interfaces are achieved with the use of atomic hydrogen (a-H) as an alternative to conventional thermal annealing for the native oxide removal. The problem of high lattice mismatch is addressed through an InxGa1−xAs buffer layer introduced between the InAs transport channel and the GaAs substrate. The GaIn material intermixing observed in both the buffer layer and the channel is inhibited via careful tuning of the growth temperature. Performing scanning transmission electron microscopy and x-ray diffraction analysis along with low-temperature transport measurements we show that optimized In-rich buffer layers promote high quality InAs transport channels with the field-effect electron mobility over 10000 cm 2 V −1 s −1. This is twice as high as for non-optimized samples and among the highest reported for InAs selective area grown nanostructures.
ACS Applied Materials & Interfaces, 2015
While shell growth engineering to the atomic scale is important for tailoring semiconductor nanowires with superior properties, a precise knowledge of the surface structure and morphology at different stages of this type of overgrowth has been lacking. We present a systematic scanning tunneling microscopy (STM) study of homoepitaxial shell growth of twinned superlattices in zinc blende InAs nanowires that transforms {111}A/B-type facets to the nonpolar {110}-type. STM imaging along the nanowires provides information on different stages of the shell growth revealing distinct differences in growth dynamics of the crystal facets and surface structures not found in the bulk. While growth of a new surface layer is initiated simultaneously (at the twin plane interface) on the {111}A and {111}B nanofacets, the step flow growth proceeds much faster on {111}A compared to {111}B leading to significant differences in roughness. Further, we observe that the atomic scale structures on the {111}B facet is different from its bulk counterpart and that shell growth on this facet occurs via steps perpendicular to the ⟨112⟩B-type directions.
Inhomogeneous Si-doping of gold-seeded InAs nanowires grown by molecular beam epitaxy
Applied Physics Letters, 2013
We have investigated in-situ Si doping of InAs nanowires grown by molecular beam epitaxy from gold seeds. The effectiveness of n-type doping is confirmed by electrical measurements showing an increase of the electron density with the Si flux. We also observe an increase of the electron density along the nanowires from the tip to the base, attributed to the dopant incorporation on the nanowire facets whereas no detectable incorporation occurs through the seed. Furthermore the Si incorporation strongly influences the lateral growth of the nanowires without giving rise to significant tapering, revealing the complex interplay between axial and lateral growth.
Low hole effective mass in thin InAs nanowires
Applied Physics Letters, 2010
The efficiency of nanoscale electronic devices usually is limited by the decrease in the carrier mobilities when the dimensionality is reduced. Using first principles calculations our results reveal that the hole effective masses of InAs nanowires decrease significantly below a threshold diameter. The mobilities have been estimated, and it is shown that for an optimal range of diameters, the hole mobilities exceeds the bulk value by up to five times, whereas the electron mobilities remain comparable to the bulk one. These results indicate that there exists a diameter window where p-type InAs based high-speed nanodevices can be fabricated.
Self-catalyzed InAs nanowires grown on Si: the key role of kinetics on their morphology
Nanotechnology
Integrating self-catalyzed InAs nanowires on Si(111) is an important step toward building vertical gate-all-around transistors. The CMOS compatibility and the nanowire aspect ratio are two crucial parameters to consider. In this work, we optimize the InAs nanowire morphology by changing the growth mode from Vapor-Solid to Vapor-Liquid-Solid in a CMOS compatible process. We study the key role of the Hydrogen surface preparation on nanowire growths and bound it to a change of the chemical potential and adatoms diffusion length on the substrate. We transfer the optimized process to patterned wafers and adapt both the surface preparation and the growth conditions. Once group III and V fluxes are balances, aspect ratio can be improved by increasing the system kinetics. Overall, we propose a method for large scale integration of CMOS compatible InAs nanowire on silicon and highlight the major role of kinetics on the growth mechanism.