Expected I-cache miss rates via the gap model (original) (raw)

ACM Sigarch Computer Architecture News, 1994

Abstract

To evaluate the performance of a memory system, computer architects must determine the miss rate m of a cache C when running program P. Typically, the measured miss rate depends on the specific address mapping M of P set arbitrarily by the compiler and linker. In this paper, we remove the effect of the address-mapping on the miss rate by

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