Sustainable Self-Cooling Framework for Cooling Computer Chip Hotspots Using Thermoelectric Modules (original) (raw)
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Energy Conversion and Management, 2019
Thermoelectric devices are currently being used in the applications of cooling and generating electricity. This study mainly focuses on using these devices for both applications toward cooling down computer chips. An important aspect in designing the cooling system is to minimize the non-uniformity of the temperature distribution in the computer chip so as to reduce the thermal stresses in it. Another aspect in designing the cooling system is to minimize its power requirements. To investigate these two aspects, the temperatures of the cold chip areas can be allowed to increase, but not to exceed a certain temperature threshold, by installing Thermoelectric Generators (TEGs) on these areas that can harvest electrical power from the chip wasted heat. Thereafter, the chip hotspot areas can be cooled down by installing Thermoelectric Coolers (TECs) on these areas that can be powered by the harvested electrical power from the TEGs in order to maintain the temperatures of these hotspots to be less than or equal a certain temperature threshold. This cooling technique is called "sustainable self-cooling framework" for cooling chip hotspots. However, the question is: can the harvested electrical power by the TEGs be enough to power the TECs for cooling chip hotspots? In this study, a 3D model is developed to optimize the performance of both TEGs and TECs. Thereafter, this model is validated against experimental data of TEC and TEG. The results showed that the model predictions were in good agreements with the experimental data to within ± 4%. Also, considerations are given in this study to optimize the performance of cascaded and noncascaded TEGs and TECs for future use them to develop sustainable self-cooling frameworks for cooling chip hotspots at different operating conditions. Finally, a case study is conducted in this paper for a sustainable selfcooling framework in order to address the question above. The results showed that the self-cooling framework can successfully cool down the hotspot at an acceptable temperature with not only no need for additional electrical power requirements but also for reducing the non-uniformity in the chip temperature distribution.
Cooling Computer Chips with Cascaded and Non-cascaded Thermoelectric Devices
Arabian Journal for Science and Engineering, 2019
Thermoelectric devices are currently being used in cooling and generating electricity applications. This study mainly focuses on using thermoelectric devices for both applications towards cooling down computer chips; especially, that the very large scale integration technology has reached high advancement where more than 100 million transistors can be fabricated in 1 mm 2. Reducing the non-uniformity of the chip temperature is important so as to decrease the induced thermal stress in this chip and consequently reduce its failure rate. To simultaneously reduce both the non-uniformity of the temperature distribution in the chip and the power requirements for the cooling system, thermoelectric generators can be installed on the cooler chip areas to harvest electrical power from the chip wasted heat. Thereafter, the chip hotspot areas are cooled down using thermoelectric coolers that are powered by the harvested electrical power from the thermoelectric generators in order to maintain the temperatures of these hotspots to be less than or equal a certain temperature threshold. Because no additional electrical power requirement is needed to cool down the hotspots, this cooling technique is called in this paper as "sustainable self-cooling framework for cooling chip hotspots". However, the question is that can the harvested electrical power by the thermoelectric generators be enough to power the thermoelectric coolers for different computer chips at a given operating condition? As such, one of the objectives of this paper is to develop a three-dimensional numerical and optimization model to predict the thermal and electrical performance of cascaded and non-cascaded thermoelectric generators and cascaded and non-cascaded thermoelectric coolers for cooling chip applications. Then, validate the developed model against experimental data. The results showed that the predictions of the developed model were in good agreement with the experimental to within ± 4%. After gaining confidence in the developed model, it was used for a given chip operating condition to conduct a case study for a sustainable self-cooling framework in order to answer the raised question above. The results showed that the self-cooling framework can successfully cool down the hotspot at an acceptable temperature with not only no need for additional electrical power requirements but also for reducing the non-uniformity in the chip temperature distribution.
Hot spot cooling using embedded thermoelectric coolers
Twenty Second Annual IEEE Semiconductor Thermal Measurement and Management Symposium, Proceedings 2006, 2006
Localized areas of high heat flux on microprocessors produce hot spots that limit their reliability and performance. With increasingly dense circuits and the integration of high power processors with low power memory, non-uniform thermal profiles will become more dramatic and difficult to manage. Chip scale thermal solutions designed to keep hot spots below a critical temperature unnecessarily overcool the rest of the CPU and add to heat-sink load. Localized hot spot cooling solutions, even active systems that contribute some additional heat, can do a better job controlling hot spot temperatures when efficiently integrated with a heat spreader. Embedded thermoelectric cooling (eTEC) is a promising approach to reduce the temperature of highly localized, high heat flux hot spots generated by today's advanced processors.
Performance analysis and assessment of thermoelectric micro cooler for electronic devices
Energy Conversion and Management, 2016
A novel operating mode of thermoelectric module (TEM, cooling, heating, generation) is established for electronic devices cooling, based on the method of effectiveness-number of transfer units (e À NTUÞ. This work mainly focused on the effect of thermoelectric properties and the scale of extender block on cooling performance under different operating conditions in order to obtain effective cooling operating mode. Based on the TEM parameters, two sets of analytical solutions for thermoelectric cooler (TEC) are derived for the chip temperature T j at a fixed cooling power Q c and Q c at a fixed T j, respectively. The performance of TEC with/without scale of extender block is studied for the lowest chip temperature and maximum cooling capacity at fixed conditions. Analysis results show the thermoelectric properties and extender block are significant characteristics for different operating conditions. However, the coefficient of performance (COP) and temperature difference changed a little under given thermoelectric properties. The results indicate TEC system applied in electronic devices obtains effectively cooling module by controlling operating parameters, which do not changed with scale of extender block. The validation of the present analysis is also conducted compared with previous studies and through the infrared thermal imager.
Performance of Novel Thermoelectric Cooling Module
A geometrical shape factor was investigated for optimum thermoelectric performance of a thermoelectric module using finite element analysis. The cooling power, electrical energy consumption, and coefficient of performance were analyzed using simulation with different current values passing through the thermoelectric elements for varying temperature differences between the two sides. A dramatic increase in cooling power density was obtained, since it was inversely proportional to the length of the thermoelectric legs. An artificial neural network model for each thermoelectric property was also developed using input-output relations. The models including the shape factor showed good predictive capability and agreement with simulation results. The correlation of the models was found to be 99%, and the overall prediction error was in the range of 1.5% and 1.0%, which is within acceptable limits. A thermoelectric module was produced based on the numerical results and was shown to be a promising device for use in cooling systems.
COOLING PERFORMANCE OF THERMOELECTRIC COOLER MODULES: EXPERIMENTAL AND NUMERICAL METHODS
A novel pulse-driving method in which the pulse frequency modulation is was developed by optimising the input power owing to the duty cycle of rectangular wave to enhance the cooling efficiency and thermal stability of the thermoelectric module. The aim of this driving method is to have better control of the thermoelectric cooler module temperature and to improve its coefficient of performance. In this method, the average current and the peak of pulse drive are in the 50% duty cycle with the same magnitude and the performance of Peltier module driving with average dc is compared with the pulse driving. The measurement results show that the coefficient of performance of the thermoelectric module with the pulse-frequency modulation driving method increased up to 102% as compared to the constant dc driving method. An artificial neural network has been successfully used to analyse these experimentally collected data and predict the performance of the module. When the developed artificial neural network model was tested using untrained data, the average correlation of the model was 99% and the overall prediction error was 1.38%. An accurate and simple analytical equation based on the predicted and experimental results was determined using the MATLAB ® Curve Fitting Toolbox. The average correlation of the analytical model was 0.99 and the root-mean-square error was 0.074.
Hotspot Cooling in Stacked Chips Using Thermoelectric Coolers
IEEE Transactions on Components, Packaging and Manufacturing Technology, 2013
3-D technologies with stacked chips have the potential to provide new chip architecture, and improved device density, performance, efficiency, and bandwidth. The increased power density in 3-D technologies can become a daunting challenge for heat removal. Furthermore, power density can be highly nonuniform, leading to time-and space-varying hotspots, which can severely affect performance and reliability of integrated circuits. It is important to mitigate on-chip thermal gradients while considering the associated cooling costs. One efficient method of hotspot thermal management is to use superlattice thermoelectric coolers (TECs), which can provide on demand and localized cooling. In this paper, a detailed 3-D thermal model of a stacked electronic package with two dies and four ultrathin integrated TECs is developed to investigate the efficacy of TECs in hotspot cooling for 3-D technology. A strong vertical coupling has been observed between TECs located in top and bottom dies. Bottom TECs can significantly heat the top hotspots in both steady-state and transient operation. TECs need to be carefully placed inside the package to avoid such undesired heating. Thermal contact resistances between dies, inside the TEC module, and between TEC and heat spreader are shown to have a crucial effect on the TEC performance. We observe up to 5.6°C of active hotspot cooling in steady state and 7.4°C of active hotspot cooling using a square root current pulse.
Analysis Of Thermoelectric Coolers As Energy Harvesters For Low Power Embedded Applications
2017
The growing popularity of solid state thermoelectric<br> devices in cooling applications has sparked an increasing diversity of<br> thermoelectric coolers (TECs) on the market, commonly known as<br> "Peltier modules". They can also be used as generators, converting<br> a temperature difference into electric power, and opportunities are<br> plentiful to make use of these devices as thermoelectric generators<br> (TEGs) to supply energy to low power, autonomous embedded<br> electronic applications. Their adoption as energy harvesters in this<br> new domain of usage is obstructed by the complex thermoelectric<br> models commonly associated with TEGs. Low cost TECs for the<br> consumer market lack the required parameters to use the models<br> because they are not intended for this mode of operation, thereby<br> urging an alternative method to obtain electric power estimations<br> in specific operating...
International Journal of Low-Carbon Technologies, 2021
The present article reports on the design, modeling and parametric optimization of a thermoelectric cooling system for electronics applications. An analytical model based on energy equilibrium is developed for cooling a microprocessor using a thermoelectric module with an air-cooled finned heat sink. The proposed analytical model is validated by experimental measurements and by comparison with detailed 3D numerical simulations. Estimation of effective material properties of the thermoelectric module using manufacturer-reported performance characteristics is found to reduce the uncertainty in the calculation of module input power as compared to experimental measurements. A parametric optimization of the thermoelectric module and heat sink is carried out to maximize the coefficient of performance (COP) and achieve the required cooling capacity of the microprocessor. The effectiveness of the proposed methodology is demonstrated for cooling current high power microprocessors. At a const...