Influence of Environmental Conditions on Electrical Stability of Pentacene Thin-film Transistors with Cross-linked Poly(4-vinylphenol-co-methyl methacrylate) Gate Dielectric Layer (original) (raw)

Gate-bias stress causes changes in the electrical stability of thin-film transistors (TFTs), and this can degrade the device performance. This research highlights the effects of environmental conditions on the electrical stability of pentacene TFTs in which cross-linked poly(4vinylphenol-co-methyl methacrylate) (PVP-co-PMMA) was utilized as a gate dielectric layer. Under negative gate-bias stress, the fabricated TFTs exposed to ambient air showed a positive threshold voltage shift, whereas the devices under vacuum exhibited a negative threshold voltage shift. Furthermore, consecutive on/off switching operation of pentacene TFTs under ambient air induced an increase in the on-state drain current. These results are explained through the interaction between water molecules and PVP-co-PMMA, which causes the accumulation of holes in the TFT channel region having higher conductance.