A Generic Izhikevich-Modelled FPGA-Realized Architecture: A Case Study of Printed English Letter Recognition (original) (raw)

2020 24th International Conference on System Theory, Control and Computing (ICSTCC), 2020

Abstract

Current machine learning developments, in auto-translation research and text comprehension, demand alphabet letter recognition as a preprocessing step. Thus, this paper presents an FPGA-implemented architecture and MATLAB-simulated model for a generalized printed letter recognition algorithm. A spiking neural network (SNN) is designed and implemented using an Altera DE2 field-programmable gate array (FPGA) for character recognition. The proposed SNN structure is a two-layer network consisting of Izhikevich neurons. A modified algorithm is proposed for training purposes. The neural structure is initially designed, trained, and implemented using a MATLAB package. The resulting weights from the training process, based on MATLAB software, are employed to synthesize the SNN for hardware implementation. The SNN software design for hardware implementation is developed using Verilog code. The designed and trained SNN classifier is used to identify four characters, the letters ‘A’ to ‘D’, on...

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