Three Simulator Tools For Teaching Computer Architecture (original) (raw)
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Three simulator tools for teaching computer architecture: Little Man computer, and RTLSim
Journal of Educational Resources in Computing, 2001
Teaching computer architecture (at any level) is not an easy task. To enhance learning, a critical mass of educators has begun using simulator visualizations of different computer architectures. Here we present three representative computer architecture simulators for learning which show that there is a growing consensus for computer simulation as a teaching tool for complex dynamic processes, such as underlying computer operations. Simulators also show the wide spectrum of pedagogical goals for teaching computer organization and architecture. Specifically, the three simulators we describe are (1) EasyCPU for the Intel 80x86 family of CPUs; (2) Little Man Computer for a general von Neumann computer architecture; and (3) RTLSim, a data path simulator for a MIPS-like CPU. An appendix is provided for more detailed descriptions of each simulator.
Computer Simulator: An Educational Tool for Computer Architecture
American Journal of Applied Sciences, 2006
The great advancement in computer architecture and cache memory design and technology had a considerable influence on the way computer architecture was taught in universities. This requires students to be able to visualize the detailed activities that take place within a computer processor and its interaction with memory system. Computer simulators could effectively be used to enhance the understanding and comprehension of cache memory operation. The main objective of this project was to design and implement a computer simulator that was used as an educational tool. This paper presents design specifications, implementation and the functional and structural components of this simulator. This allows students understand the concepts and theory of the computer hardware topics by constructing and verifying knowledge, testing and comparing several different configurations and memory access. Although there was a large number of computer simulators in the market, this simulator differs in the way it contains a specially designed assembler that feeds the simulator with the binary code. In this context it was a tool that provides a high educational value that, on one hand, helps students learn to write an error-free assembly code and on the other hand comprehend the activities that take place during the execution of the program under different settings. At the front-end of the system there are two parts; the editor and the simulator while at the back-end there are the system specially developed assembler and database.
p88110: A Graphical Simulator for Computer Architecture and Organization Courses
IEEE Transactions on Education, 2000
Studying fundamental computer architecture and organization topics requires a significant amount of practical work if students are to acquire a good grasp of the theoretical concepts presented in classroom lectures or textbooks. The use of simulators is commonly adopted in order to reach this objective. However, as most of the available educational simulators focus on specific topics, different laboratory assignments
Simulators for courses in advance computer architecture
Facta universitatis - series: Electronics and Energetics, 2005
The usage of simulator in teaching computer architecture courses has proven to be the most acceptable way, especially when the simulators offer rich graphical and visual representation of the architecture. In this paper we present several simulators used to teach ILP (Instruction Level of Parallelism) courses. The simulators cover wide area of concepts such as internal logic organization, datapath, control, memory behavior, register renaming, branch prediction, and overall out of order execution. Special dedicated simulators cover details in internal organization like Tomasulo approach and scoreboard for organization of reservation stations. This innovative approach in laboratory exercises is used for advanced ILP course.
EVALUATION OF A SIMULATOR TO SUPPORT THE TEACHING OF COMPUTER ARCHITECTURE
Computer-based graphical simulators are widely used in universities to support the teaching of computer architecture. This paper describes how pre-and post-tests, attitudinal questionnaires and intervention questionnaires were used to evaluate a cache memory simulator. The methods by which such testing was implemented and how the data was analysed are discussed. Conclusions are presented concerning the educational effectiveness of the simulator.
Using two Educational Simulator Tools for Computer Architecture Teaching and Learning Support
International Journal of Computer Applications
Simulators are commonly used in any computer architecture course as primary tools for supporting the teaching and learning activity. We have developed two educational simulator tools to support teaching and learning of the MESI cache coherence protocol and dynamic scheduling using Tomasulo's Algorithm. We have used these simulators during the spring semester of the academic year 2016-2017, in the context of the "Advanced Computer Architecture" course offered by the Informatics department of the Technological Educational Institute (T.E.I.) of Athens. In this paper we briefly present these simulators and evaluate their impact on the learning process. The results are presented both qualitatively and quantitatively and are strongly indicate that the use of the two simulators can effectively support the learning process and enhance learning.
Incorporating Simulation and Implementation into Teaching Computer Organization and Architecture
Proceedings Frontiers in Education 35th Annual Conference
This paper describes the motivation, the realization, and the experience of incorporating simulation and hardware implementation into teaching computer organization and architecture to computer science students. It demonstrates that learning by doing has helped students to truly understand how a computer is constructed and how it really works in practice. Correlated with textbook material, a set of simulation and implementation projects were created on the basis of the work that students had done in previous homework and laboratory activities. Students can thus use these designs as building blocks for completing more complex projects at a later time. The projects cover a wide range of topics from simple adders up to ALU's and CPU's. These processors operate in a virtual manner on certain short assembly-language programs. Specifically, this paper shares the experience of using simulation tools (Altera ® Quartus II) and reconfigurable hardware prototyping platforms (Altera ® UP2 development boards).
Workshop on Computer Architecture Education
2006
9:05 Keynote, “A systems approach to teaching computer systems, ” Frans Kaashoek, MIT.................... 2 Session 2. Embedded systems, 10:05–10:30 10:05 Experiences with the Blackfin architecture in an embedded systems lab, Michael Benjamin, David Kaeli, and Richard Platcow, Northeastern University........................................................................ 3 Break 10:30–11:00 Session 3. Simulation environments 11:00–12:30 11:00 “PSATSim: An interactive graphical superscalar architecture simulator for power and performance analysis, ” Clint W. Smullen, IV and Tarek M. Taha, Clemson University................. 10 11:25 “An execution-driven simulation tool for teaching cache memories in introductory computer
IEEE Transactions on Education, 2000
Courses in Computer Architecture and Organization are regularly included in Computer Engineering curricula. These courses are usually organized in such a way that students obtain not only a purely theoretical experience, but also a practical understanding of the topics lectured. This practical work is usually done in a laboratory using simulators of computer systems. Since the open literature contains a variety of simulators being used for such purposes, this paper attempts to give a survey of simulators suitable for teaching courses in computer architecture and organization, to establish the evaluation criteria and to evaluate selected simulators according to these criteria.
Computer architecture simulation applets for use in teaching
2003
Visualisation of the activities which occur inside a computer is an important aspect of computer architecture education. At the University of Edinburgh we are using a Hierarchical Computer Architecture design and Simulation Environment (HASE) to build a number of architectural models for use in research and teaching. A new facility within HASE, JavaHASE, allows models to be translated into applets which can be accessed via the WWW. JavaHASE applets are programmable simulation models in which the code and data memory contents can be altered, the simulation re-run in the applet and the results used to visualise the activities taking place within the model (data movements, state changes, register/memory content changes, etc). These applets are being used in various ways in teaching.