Systematic design of double-sampling Sigma Delta ADC'S with modified NTF (original) (raw)
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IEEE Transactions on Circuits and Systems II: Express Briefs, 2004
Double-sampling 61 analog-digital converters (ADCs) are sensitive to path mismatch which causes quantization noise to fold into the signal band. A recent solution for this problem consists of modifying the noise transfer function (NTF) of the modulator such that it has one or several zeros at the Nyquist frequency, next to those in the baseband. In this brief, we present a systematic design strategy for such ADCs. It consists of finding optimal pole positions for the modified NTF. This can be combined with optimizing the zeros as well. Next, we introduce several efficient structures that have enough degrees of freedom to realize the optimized pole positions.
Systematic design of double-sampling ΣΔ ADC's with modified NTF
A disadvantage of double-sampling ΣΔ ADC's is their sensitivity to path mismatch. Recently, an approach to solve this problem was presented. It consists of modifying the noise transfer function (NTF) of the modulator such that it has a zero at the Nyquist frequency, next to those in the baseband. Unfortunately, no systematic design strategy for such ADC's is available. In this work, we present such a strategy. It consists of finding optimal pole positions for the modified NTF. This can be combined with optimizing the zeros of the NTF. Next, we introduce an efficient structure that has enough flexibility to realize the optimized pole positions.
An approach to tackle quantization noise folding in double-sampling ΣΔ modulation A/D converters
IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, 2003
61-modulation is a proven method to realize high-and very high-resolution analog-to-digital converters. A particularly efficient way to implement such a modulator uses double-sampling where the circuit operates during both clock phases of the master-clock. Hence, the sampling frequency is twice the master-clock frequency. Unfortunately, path mismatch between both sampling branches causes a part of the quantization noise to fold from the Nyquist frequency back in the signal band. Therefore, the performance is severely degraded. In this paper, we show that the problem is reduced but not eliminated by employing multibit quantization. Next, we present an indepth solution for the problem. The approach consists of modifying the quantization noise transfer function of the overall modulator to have one or several zeros at the Nyquist frequency. This way the effect of noise folding can nearly be eliminated. It is shown that this can be implemented by a simple modification of one of the integrators of the overall modulator circuit. Finally, several design examples of single-bit and multibit modulators are discussed.
Iscas, 2002
¦¡-modulation is a proven method to realize high-resolution A/D converters. A particularly efficient way to implement such a modulator uses double-sampling where the sampling frequency is twice the master-clock frequency. Unfortunately path mismatch between both sampling branches causes a part of the quantisation noise to fold from the Nyquist frequency back in the signal band. This degrades the performance. In this paper we show that multi-bit quantisation provides a partial solution for this problem.
A 250-khz 94-db double-sampling ΣΔ modulation a/d converter with a modified noise transfer function
IEEE Journal of Solid-State Circuits, 2003
This paper presents a high-order double-sampling single-loop 61 modulation analog-to-digital (A/D) converter. The important problem of noise folding in double-sampling circuits is solved here at the architectural level by placing one of the zeros in the modulator's noise transfer function at half the sampling frequency instead of in the baseband. The resulting modulator is of fifth order but has the baseband performance of a fourth-order modulator. Through the use of an efficient switched-capacitor implementation, the overall circuit uses only four operational amplifiers and hence, its complexity is similar to that of a fourth-order modulator.
Systematic Design Exploration of Delta-Sigma ADCs
IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications, 2004
An algorithm for architecture-level exploration of the 16 A/D converter (ADC) design space is presented. Starting from the desired specification, the algorithm finds an optimal solution by exhaustively exploring both single-loop and cascaded architectures, with a single-bit or multibit quantizer, for a range of oversampling ratios. A fast filter-level step evaluates the performance of all loop-filter topologies and passes the accepted solutions to the architecture-level optimization step which maps the filters on feasible architectures and evaluates their performance. The power consumption of each accepted architecture is estimated and the best top-ten solutions in terms of the ratio of peak signal-to-noise+distortion ratio versus power consumption are further optimized for yield. Experimental results for two different design targets are presented. They show that previously published solutions are among the best architectures for a given target but that better solutions can be designed as well.
Improved performance of multi-bit delta-sigma analog to digital converters via requantization
1991., IEEE International Sympoisum on Circuits and Systems
System performance of an oversampled analog to digital converter (ADC) with feedback noise shaping is limited by the precision of the digital to analog converter (DAC) in the feedback path as well as by the number of integrators in the loop(s): Standard designs avoid the DAC precision problem by restricting the ADC and DAC to a single bit while stability and matching considerations limit systems to three loops. This limit in turn defines the oversample ratio for a given effective bandwidth and noise performance. We present a simple modification to the oversampled ADC which avoids these limitations via requantization in the feedback path of the original delta sigma loop structure. This modification results in greater dynamic range than is available from standard configurations.
An efficient technique to eliminate quantisation noise folding in double-sampling ΣΔ modulators
¦¡-modulation is a proven method to realize high-resolution A/D converters. A particularly efficient way to implement such a modulator uses double-sampling where the sampling frequency is twice the master-clock frequency. Unfortunately path mismatch between both sampling branches causes a part of the quantisation noise to fold from the Nyquist frequency back in the signal band. This degrades the performance. In this paper we show that multi-bit quantisation provides a partial solution for this problem.
A double-sampling cross noise-coupled split ΣΔ-modulation A/D converter with 80 dB SNR
… , Circuits, and Systems, 2009
This paper presents the design of a double-sampling split Σ∆-modulation analog-to-digital converter with cross noisecoupling. Double-sampling is used to achieve high conversion speed and low power consumption. To tackle the problem of quantization noise folding due to path mismatch, a fully floating bilinear integrator is used. Then the quantization noise is crosscoupled between two identical Σ∆-modulators. This increases the effective noise shaping order of this structure with one. The final design is an optimized second order double-sampling split Σ∆modulator with third order noise shaping through cross noisecoupling. This design is simulated at transistor level in an 0.18µm CMOS process for 80 dB SNR and 5 MHz bandwidth.
An Overview of Sigma-Delta Converters: How a 1-bit ADC achieves more than 16-bit resolution
Departmental Papers, 1996
This article briefly describes conventional A/D conversion, as well as its performance modeling. We then look at the technique of oversampling, which can be used to improve the resolution of classical A/D methods. We discuss how sigma-delta converters use the technique of noise shaping in addition to oversampling to allow high resolution conversion of relatively low bandwidth signals. Next, we examine the use of sigma-delta converters to convert narrowband bandpass signals with high resolution. Several parallel sigma-delta converters, which offer the potential of extending high resolution conversion to signals with higher bandwidths, are also described.