Advanced Cu Electroplating Process for Any Layer Via Fill Applications with Thin Surface Copper (original) (raw)

Copper-filled micro-vias are a key technology in high density interconnect (HDI) designs that have enabled increasing miniaturization and densification of printed circuit boards for the next generation of electronic products. Compared with standard plated through holes (PTHs) copper filled vias provide greater design flexibility, improved signal performance, and can potentially help reduce layer count, thus reducing cost. Considering these advantages, there are strong incentives to optimize the via filling process. This paper presents an innovative DC acid copper via fill formulation, for VCP (Vertical Continues Plating) applications which rapidly fills vias while minimizing surface plating. For instance, a 125x75 μm via was filled with only 10 μm Cu deposited on the outer layer surfaces. X-ray diffraction studies were done to obtain information about the grain structure (texture) of the deposit. Based on determination of the Lotgering factor the study shows that the (111) plane has...