A software-based interactive system on BZK.SAU.FPGA10.1 micro computer design for teaching computer architecture and organization (original) (raw)
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In this paper, we briefly present our design decisions and challenges involved in designing the hardware/software tools that we prepared based on our several years of experience in teaching logic circuits and computer architecture which help students of the first course in computer architecture to familiarize themselves with the basic operations of a computer. In fact, we first present the hardware of an 8-bit processor and its I/O and memory board that we have specifically designed and built using basic logic ICs for pedagogical purposes. We then go over the features and design challenges of a special monitor program we created. This monitor program directly runs on the top of our 8-bit processor and provides invaluable features, such as executing the students' program in two possible modes (single step and continuous run), displaying the contents of CPU registers, flags, and relevant memory locations, in addition to the ability to pause the program execution on real hardware, and modify these contents and continue.
Effective Approach for Teaching Computer System Architecture
wseas.us
Abstract: - The present Basic Computer is a concept that demonstrates the least features that a digital computer must exhibit. To make itself to be called a general purpose computer; the Basic Computer is able to execute a stored program in automatic fashion. It has the ability to ...
Proceedings of the ninth …, 2007
Students learn better when they both hear and do. In computer architecture courses "doing" can be difficult in small schools without hardware labs hosted by computer engineering, electrical engineering, or similar departments. Software solutions exist. Our success with George Mills' Multimedia Logic (MML) is the focus of this paper. We have found that students learn and understand more, and experience less frustration, without the additional complexity of hardware details. MML provides a graphical computer architecture solution with convenient I/O support and the ability to build and emulate a variety of computer designs. It has proven highly motivational to upper-division computer science students designing and constructing emulated computers. Student projects resulted in excellent student understanding of the detailed inner workings of computers. Students also developed better teamwork skills and produced useful training aids for the lowerdivision computer organization class. Designs implemented include 8-bit and 16-bit, von Neumann and Harvard architectures, from single-cycle to twelve-cycle instructions. Issues resolved during the learning process include timing, initialization, instruction set architecture, I/O, and assembler design. We provide two demonstration computers used to illustrate to students a design approach and an expected outcome in their individual design activities. One example is an eight-bit Harvard architecture with eight instructions that execute in a single clock cycle. The second is an eight-bit von Neumann architecture that has four instructions and executes each instruction in three clock cycles. This paper describes these two example computers.
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IEEE Transactions on Education, 1991
This paper describes a computer-aided teaching (CAT) package for use in a microprocessor systems course. It uses the ZSO CPU [ l ] , [5] as the basis for describing how an 8-bit CPU functions internally and as the master of a microcomputer system [2]-[4]. The package, which consists of an assembler and a graphics simulator, aids as a powerful teaching tool that enables the student to learn about the internal architecture of a microprocessor [7]-[lo] as applied to the Z80 CPU and its instruction set with a step by step graphics animation of the instruction execution and timing. The package allows the user to execute a program step by step and to test the operation of the internal registers, buses, and memory contents at every clock edge. This helps the student to understand exactly how the hardware works at the clock cycle, machine cycle, and instruction cycle levels. It also simulates read/write cycles from/ to memory and input-output devices. Finally, it allows the user to write and debug programs at the assembly language or machine code level. The package is menu driven, interactive, flexible, and user-friendly.
Use of a New Moodle Module for Improving the Teaching of a Basic Course on Computer Architecture
IEEE Transactions on Education, 2000
This paper describes how a new Moodle module, called CTPracticals, is applied to the teaching of the practical content of a basic computer organization course. In the core of the module, an automatic verification engine enables it to process the VHDL designs automatically as they are submitted. Moreover, a straightforward modification of this engine would make it possible to extend its application to other programming languages. The module provides students with real-time knowledge of the state of their work by their accessing the result of the automatic assessment or feedback messages. Teachers have a constant global view of the status of their class and have available multiple options such as sending feedback messages to students, obtaining statistics, launching additional verifications in batch, and so on. Likewise, the module substantially improves some organizational aspects, and its design may help teachers to encourage teamwork. Its use partially frees teachers from certain routine work, saving time that can be devoted to teaching objectives and tutoring activities.
Education, IEEE Transactions on, 2001
This paper describes a new way to teach computer organization and architecture concepts with extensive hands-on hardware design experience very early in computer science curricula. While describing the approach, it addresses relevant questions about teaching computer organization, computer architecture and hardware design to students in computer science and related fields. The justification to concomitantly teach two often separately addressed subjects is twofold. First, to provide a better insight into the practical aspects of computer organization and architecture. Second, to allow addressing only highly abstract design levels yet achieving reasonably performing implementations, to make the integrated teaching approach feasible. The approach exposes students to many of the essential issues incurred in the analysis, simulation, design and effective implementation of processors. Although the former separation of such connected disciplines has certainly brought academic benefits in the past, some modern technologies allow capitalizing on their integration. Indeed, the new approach is enabled by the availability of two new technologies, fast hardware prototyping platforms built with reconfigurable, hardware and powerful computer-aided design tools for design entry, validation and implementation. The practical implementation of the teaching approach comprises lecture as well as laboratory courses, starting in the third semester of an undergraduate computer science curriculum. In four editions of the first two courses, most students have obtained successful processor implementations. In some cases, considerably complex applications, such as bubble sort and quick sort procedures were programed in assembly and or machine code and run at the hardware description language simulation level in the designed processors.
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32nd Annual Frontiers in Education, 2002
This work describes part of a novel approach employed at the authors' institution in the last five years, which comprises the teaching of computer organization/ architecture through the effective implementation of processors and computers. The context of the courses is presented first, including a comparison of two hardware courses tracks in Computer Science and Computer Engineering curricula. Previous publications have described the structure of courses dealing with the minimal implementation of a working processor. Here, the emphasis is on subsequent courses, which take the minimal implementation and guide the students through the necessary steps to add performance, such as pipelining, and functionality, such as memory management and basic IO subsystems.
Teaching Computer Organization and Architecture Using Simulation and FPGA Applications
Journal of Computer Sciences, 2007
This paper presents the design concepts and realization of incorporating micro-operation simulation and FPGA implementation into a teaching tool for computer organization and architecture. This teaching tool helps computer engineering and computer science students to be familiarized practically with computer organization and architecture through the development of their own instruction set, computer programming and interfacing experiments. A two-pass assembler has been designed and implemented to write assembly programs in this teaching tool. In addition to the microoperation simulation, the complete configuration can be run on Xilinx Spartan-3 FPGA board. Such implementation offers good code density, easy customization, easily developed software, small area, and high performance at low cost.