TRL Calibration Applied to the Measurement of Chip Transistor S-Parameters Up to 40 GHz (original) (raw)
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IEEE Transactions on Microwave Theory and Techniques, 1990
A new approach for calibrating coaxial-to-microstrip transitions up to 26.5 GHz with high precision is presented. An ideal through, noncritical open, noncritical short, and a surface absorber are used as microstrip standards for the calibration. The calibration measurement and a novel approach in extracting the scattering parameters of the transitions are described. Error-corrected results on broad-band measurements of the scattering coefficients of packaged FET's in a hybrid circuit configuration are given.
IEEE Transactions on Terahertz Science and Technology, 2021
In this work we introduce novel transmission line standards for on-wafer TRL calibration employing a meandering architecture, which aims to keep the inter-probe distance constant and avoid any probe separation during the measurement process, yet establishing the required signal path length between the ports. Measurements will be performed up to 500 GHz on passive de-embedding structures and on a SiGe HBT; they will be calibrated with both a classic approach and this novel "meander-type" technique. Furthermore, measurements will be evaluated by means of electromagnetic (EM) simulation: for this purpose, we will make use of Ansys HFSS on passive test structures. Finally, a novel joint EM-SPICE co-simulation analysis will allow to provide simulated data for a transistor, thus extending our study to active devices; this will allow a complete characterization of the measurements and an insight on the physical limits of our calibration technique.
IEEE Transactions on Microwave Theory and Techniques, 2017
In this paper, we propose a method based on 3-D electromagnetic simulations, for the characteristic impedance extraction of transmission lines employed in TRL calibration, focusing on lines integrated in silicon technologies. The accuracy achieved with TRL calibrations using the proposed characteristic impedance extraction is benchmarked versus conventional approaches, with an emphasis on aluminum pads structures operating in the (sub) millimeter-wave range. The proposed method proves to be insensitive to common sources of error (i.e., large pad capacitance and inductive pad-to-line transitions), which affect the accuracy of characteristic impedance extraction based on measurements, especially as the testing frequency increases. First, direct on-wafer TRL calibrations are performed on uniform CPWs (i.e., with no pads discontinuities) to demonstrate how the proposed method performs as good as the calibration comparison method and outperforms calibration transfer approaches. Finally, the method is applied to a nonuniform CPW-based calibration kit, demonstrating how the proposed method provides accurate results, improving the calibration quality that can be achieved using the calibration comparison method when inductive pad-toline transitions are present.
Design of On-Wafer TRL Calibration Kit for InP Technologies Characterization up to 500 GHz
IEEE Transactions on Electron Devices, 2020
This paper reports a detailed approach towards optimization of on-wafer TRL calibration structures for submillimeter-wave characterization of a state-of-the-art InP technology, validated by thorough experimentation and electromagnetic (EM) simulation. The limitations of the existing RF test structures for high frequency measurements beyond 110 GHz are analyzed through EM simulation. Using an optimization procedure based on calibration of raw EM simulated data, onwafer TRL calibration structures were developed and fabricated in a subsequent run of this technology. Measurements could be achieved up to 500 GHz on the passive devices and up to 330 GHz on the InP DHBTs. The transistor measurements were validated by comparison with the HiCuM compact model simulation to 330 GHz for the InP DHBTs.
IEEE Transactions on Terahertz Science and Technology, 2018
Sub-mm circuit design requires accurate on-wafer characterization of passive and active devices. In industry, characterization of these devices is often performed with offwafer SOLT calibration. In this work, validity of this characterization procedure above 110 GHz is investigated by an exhaustive study of on-wafer and alumina off-wafer calibration using measurement and electromagnetic (EM) simulation up to 500 GHz. The EM simulation is performed at two different levels, first at the intrinsic level of the devices under test for reference and afterward up to the probe level to simulate different standards used in the off-wafer calibration or in the on-wafer calibration in presence of the probe. Further, EM simulation data is calibrated with the same procedures and tools that is used in the measurement; therefore, it includes the probe-to-substrate coupling. In addition, precise EM model of a commercial impedance standard substrate (ISS) is developed and used to perform the SOLT calibration. A good agreement is observed between measurement and EM modelling for the off-wafer calibration as well as for the on-wafer calibration. Results clearly highlights a limitation of alumina off-wafer methodology above 200 GHz for characterization of Silicon based technologies. Finally a discussion is given on the pros and cons of the off-wafer and on-wafer methodologies.
IEEE Transactions on Microwave Theory and Techniques, 2018
This paper investigates on-wafer characterization of SiGe HBTs up to 500 GHz. Test structures for on-wafer TRL calibration have been designed and are presented. The TRL calibration method with silicon standards has first been benchmarked through EM-simulation. Passive and active components are then characterized up to 500 GHz. The slight discontinuities between the frequency bands are explored. A specific focus was placed on incorrect horizontal probe positioning as well as on probe deformation, resulting in a better assessment of possible measurement errors.
At millimetre wave frequencies the use of coaxial based test fixtures does not provide an accurate characterisation of planar passive or active devices. Tests using coplanar probes produce more reliable and repeatable device measurements. A suitable method to perform device characterisation is through broadband coplanar to microstrip transitions. A test bench for obtaining S-parameters up to 50 GHz is described. Calibration method and test results of passive and active circuits and devices are presented. The obtained experimental S-parameters have been used for circuit design and further integration of millimetre wave receiver systems.
Modeling and parameter extraction of test fixtures for MOSFET on-wafer measurements up to 60 GHz
International Journal of RF and Microwave Computer-Aided Engineering, 2013
We present a circuit model and parameter determination methodology for test fixtures used for on-wafer S-parameter measurements on CMOS devices. The model incorporates the frequency dependence of the series resistances and inductances due to the skin effect occurring in the metal pads. Physically based representations for this effect allow for excellent theory-experiment correlations for different dummy structures, as well as when de-embedding transistor measurements up to 60 GHz. V C 2012 Wiley Periodicals, Inc. Int J RF and Microwave CAE 23:655-661, 2013.
2009
This paper will present the results of extracting the electrical characteristics of planar lines using the calibration comparison method for standards realized in IBM's advanced 0.13 J.1m CMOS process. For the first time, this method is applied to characterizing the customized standards on silicon up to 110 GHz. Additionally, this paper considers the influences of the reference benchmark calibration standards, included with GaAs reference material RM8130, on the characterization accuracy of silicon wafer-embedded lines at mm-wave frequencies. This paper will present the results of extracting the electrical characteristics of planar lines using the calibration comparison method for standards realized in an IBM advanced 0.13 urn CMOS process. For the first time, this method is applied to characterize customized standards on silicon up to 110 GHz. Additionally, this paper considers the influences of wafer probes and the reference benchmark calibration standards on the characterization accuracy of lines on silicon.