Analytical Exploration of Stepped Asymmetric Workfunction Modulated Trenched Stack Gate Silicon-on-Insulator MOSFET for Advancement of SCEs (original) (raw)

2021 International Conference in Advances in Power, Signal, and Information Technology (APSIT), 2021

Abstract

A thoughtful analysis of an innovative stepped asymmetric stack gate structure with graded workfunction has been assembled for rectangular trenched gate (SAS-GWRTG) silicon on insulator (SOI) MOSFET on TCAD device simulator. A compact model for the proposed structure has been formulated by solving the Poisson's equation. This structure takes advantage of the recessed channel to enhance the short channel effects (SCEs) and stepped stack gate at the drain side to improve the hot carrier effect. Further with graded work-function at the source side gate provides an enhanced device analog performance. The influence of negative junction depth (NJD) is explored on the sub-threshold parameters to achieve an optimized device performance. Investigation reveals the enhanced performance manifested by the proposed structure with better switching behaviour, high immunity to SCEs, and increased carrier transportation efficiency. So, this meaningful research is relatively beneficial for nano-scaled short channel devices.

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