Gate leakage reduction for scaled devices using transistor stacking (original) (raw)

IEEE Transactions on Very Large Scale Integration Systems, 2003

Kaushik Roy

Abstract

Abstract In this paper, the effect of gate tunneling current in ultra-thin gate oxide MOS devices of effective length (L eff) of 25nm (oxide thickness= 1.1 nm), 50 nm (oxide thickness= 1.5 nm) and 90 nm (oxide thickness= 2.5 nm) is studied using device ...

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