Comparitive Study of Finfet Based Multipliers with Different Adder Circuits (original) (raw)

Solid State Technology, 2020

Abstract

— In digital VLSI Binary Multiplier is an important part of many units like Arithmetic and Logicalunits, DSP units, image processing and various other application units. Hence it is important to develop alow cost, fast and power efficient multiplier. In this paper we are going to review various Multipliersdesigned with FAs, HAs and with compressor circuits using FinFET technology. Every multiplier has itsown process of partial product generation, partial product reduction and final addition technique. Addersplay vital role in design of multiplier and compressors help to reduce hardware. The important performanceparameters are area, power and delay while designing a multiplier. In this paper we are going to docomparative analysis of these multipliers and exploring their methodology by giving an insight into them.

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