Growth of silicon nanowires by sputtering and evaporation methods (original) (raw)

Chemical-vapour-deposition growth and electrical characterization of intrinsic silicon nanowires

2009

In this work, we present the elaboration and the electrical characterisation of undoped silicon nanowires (SiNWs) which are grown via vapour-liquid-solid mechanism using Au nucleation catalyst and SiH 4 as the silicon source. The nanowires were investigated by high-resolution transmission electron microscopy. An electrical test structure was realized by a dispersion of the nanowires on SiO 2 /Si substrate with photolithography pre-patterned Au/Ti microelectrodes. The connexion is made on a single nanowire using a cross beam plate form allowing scanning electron microscopy imaging and the deposition of tungsten wiring by focussed ion beam deposition. The current-voltage characteristics of the nanowires are linear which indicates an ohmic contact between tungsten allow and SiNWs. The total resistance of the nanowires increases from 135 M to 5 G when the diameter decreases from 190 to 130 nm. This effect is may be due to the reduction of the conductive inner volume of the nanowires and to charged defects at the Si-SiO 2 interface if we assume that the contact resistance is constant. Moreover, gate-dependent current versus bias voltage measurement show that the nanowires exhibit a field effect response characteristic of a p-type semiconductor.

Synthesis and optical properties of silicon nanowires grown by different methods

2006

Abstract We review our recent results on the growth and characterization of silicon nanowires (SiNWs). Vapour-phase deposition techniques are considered, including chemical vapour deposition (CVD), plasma-enhanced chemical vapour deposition (PECVD), high-temperature annealing, and thermal evaporation. We present complementary approaches to SiNW production. We investigate the low-temperature (down to 300 C) selective nucleation of SiNWs by Au-catalysed CVD and PECVD.

Silicon Nanowire Growth and Properties: A Review

Materials Express, 2011

Over the last few years silicon nanowires have come under intensive research due to their promising physical properties and potential as active materials in future electronic and optoelectronic applications. This article reviews various bottom-up growth methods of silicon nanowires. Various catalysts, including gold and other metals, as well as non-catalyst initiated growth methods are discussed in detail by comparing recipes including important parameters such as growth temperature, catalyst deposition methods, silicon nanowires diameter obtained, surface quality etc. This is expected to allow for an easier selection of a suitable growth method for a desired application. In addition, this article briefly reviews some of the developments in the field of silicon nanowire electronics and optoelectronics, including theoretical and experimental determination of charge carrier mobilities, visible photoluminescence, as well as a few recent examples of photodetectors and solar cells using silicon nanowires.

Silicon nanowire growth by electron beam evaporation: Kinetic and energetic contributions to the growth morphology

Journal of Crystal Growth, 2007

The vertical and epitaxial growth of long (up to a few microns) silicon nanowires on Si(1 1 1) substrates by electron beam evaporation (EBE) (10 À6-10 À7 mbar) is demonstrated at temperatures between 600 and 700 1C following the vapour-liquid-solid (VLS) growth mechanism from gold nanoparticles. The silicon atoms are provided by evaporating silicon at varying evaporation currents (I E) between 35 and 80 mA, which results in growth rates between 1 and 100 nm/min. The growth peculiarities in the interaction triangle, evaporation current (I E), growth temperature (T S) and gold layer thickness (d Au) will be reported. Kinetic and energetic contributions to the morphology of silicon nanowires will be discussed.

Controlled growth of silicon nanowires synthesized via solid–liquid–solid mechanism

Science and Technology of Advanced Materials, 2005

The growth of silicon nanowires using solid-liquid-solid method is described. In this method, silicon substrates coated with a thin layer of gold were heat treated in nitrogen ambient. Gold particles started to diffuse into the silicon substrate and Au-Si alloy formed at the interface. The alloy would have molten to form liquid droplets on the substrate when temperature increases above their eutectic point, and more Si atoms diffused into these alloy droplets when heating continues. Rapid cooling of the droplet surface due to nitrogen flow into the chamber would eventually lead to the phase separation of silicon atoms from the surface of the alloy, created the nucleation and thus the growth of silicon nanowires. Controlled growth of the nanowire could be achieved by annealing the sample at 1000 8C with nitrogen flow rate set to around 1.5 l/min. The synthesized nanowires with diameter varied from 30 to 70 nm, were straight and grew along the N 2 flow. Larger amount and longer nanowires were grown when longer period of heating was applied. Nanowires with lengths more than several hundreds of micrometers were achieved by annealing the sample for 4 h. q

Synthesis of Small Diameter Silicon Nanowires on SiO2 and Si3N4 Surfaces

Ieice Transactions, 2010

We report successful bottom-up synthesis of small diameter silicon nanowires (SiNWs) on SiO2 and Si3N4 surfaces. SiNWs with diameter comparable to the diameter of the Au nano-particles (10-20nm) were grown on these surfaces, as well as on Si substrates which are commonly used for the nanowire growth. The growth temperature for obtaining a high density of SiNWs on SiO2 and

Characterization of silicon nano wires prepared by thermal evaporation using AuPd catalyst

2009

Silicon nanowires were synthesized on Si substrates (111) via thermal evaporation using AuPd thin layer catalyst. Pre cleaned of Si wafer was used as a substrate to assemble the nanostructure products. In this work, the effect of growth temperature that ranging from 800 to 1000 o C on the formation of silicon nanowires studied extensively. X-ray diffraction and field emission scanning electron microscope were employed to characterize the structures and morphology of nanowires. Vertical aligned silicon nanowires have been successfully grown on Si substrates at 900 and 1000 o C. At 1100 o C, the high aspect ratio of silicon nanowires can be produced but the formation density is low. The presence of AuPd catalyst on the tip of nanowires, it is expected that VLS is the most suitable to explain the growth mechanism of obtained SiNWs. The crystalline structure of SiNWs was proved by XRD data. ABSTRAK Silikon nanowires disintesiskan pada substrat Si (111) melalui penyejatan terma menggunakan lapisan nipis AuPd pemangkin. Sebelum dibersihkan Si wafer telah digunakan seperti satu substrat bagi memasang nanostructure produk. Dalam kerja ini, kesan pertumbuhan itu suhu yang meletakkan dari 800 hingga 1000 o C pada pembentukan silikon itu nanowires belajar dengan meluas. Belauan sinar-X dan mikroskop elektron penskanan pancaran medan diambil bekerja untuk mencirikan struktur-struktur itu dan morfologi nanowires. Silikon jajar tegak nanowires telah dengan jayanya ditanam atas substrat Si pada 900 dan 1000 o C. Pada 1100 o C, nisbah aspek atasan silikon nanowires akan dapat dikeluarkan tetapi ketumpatan pembentukan adalah rendah. Kehadiran bagi AuPd pemangkin pada hujung nanowires, ia dijangka yang VLS adalah paling sesuai untuk menjelaskan pertumbuhan mekanisme memperolehi SiNWs. Struktur habluran bagi SiNWs adalah terbukti oleh data XRD.

Growth Of Tin Catalyzed Silicon Nanowires By Electron Beam Evaporation

Advanced Materials Letters, 2013

Silicon nanowires were grown on tin (Sn) coated Si substrates using electron beam evaporation technique at a growth temperature of 350°C. The as grown Si nanowires were characterized by Field Emission Scanning Electron Microscope (FESEM), Transmission Electron Microscopy attached with Energy Dispersive X-Ray Analyser (TEM-EDX) for their morphological, structural, and compositional properties, respectively. The grown Si nanowires were randomly oriented on the substrate with a length of ~ 500 nm for a deposition time of 15 min. Silicon nanowires have shown tin nanoparticle (capped) on top of it confirming the Vapor-Liquid-Solid (VLS) growth mechanism responsible for Si nanowires growth. The nanowire growth rate was measured to be ~30 nm/min. Transmission Electron Microscope (TEM) measurements have revealed single crystalline nature of Si nanowires. The obtained results have indicated good progress towards finding alternative catalyst to gold for the synthesis of Si nanowires.

Fabrication of horizontally grown silicon nanowires using a thin aluminum film as a catalyst

2010

We present a new method for the fabrication of horizontal silicon nanowires for application in nanoelectronic devices. A web of horizontally connected silicon nanowires is grown on a silicon substrate using a thin aluminum film as a catalyst. A thin layer of oxide is thermally grown on a silicon substrate. The oxide layer is then selectively etched using photolithography. A thin layer of aluminum is thermally evaporated on the substrate with the patterned oxide layer. When the sample is annealed above the eutectic temperature, we show that the silicon gets deposited along the grain boundaries of aluminum in the form of thin nanowires. We show that this phenomenon is due to the high solubility of silicon in aluminum at high temperatures. The surface morphology was analyzed using Scanning Electron Microscopy (SEM). The compositional analysis was done using Energy Dispersive X-ray spectroscopy (EDX).

Vapor–Liquid–Solid Growth of Small- and Uniform-Diameter Silicon Nanowires at Low Temperature from Si 2 H 6

Applied Physics Express, 2008

We report 350 C as a critical growth temperature for overcoming the aggregation of gold (Au) in the synthesis of high-density silicon nanowires (SiNWs) with controlled diameters in a vapor-liquid-solid (VLS) mechanism by the low-temperature decomposition of Si 2 H 6. Low-temperature growth is considered essential for preserving the initial distribution of Au droplets (8 AE 5 nm) during SiNW nucleation with small (12 nm) and uniform (AE5 nm) diameters. Au-Si eutectics increase in size with aggregation at high temperatures, resulting in SiNWs with large and random diameters. The crystal quality, defect formation, and morphology of the wires, grown in the (111) direction, are size dependent.